Space_vector_modulator_for_Vienna_type_rectifiers

1888 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 23, NO. 4, JULY 2008 Space Vector Modulator for Vienna-Type Rectifiers Based on the Equivalence Between Two- and Three-Level Converters: A Carrier-Based Implementation Rolando Burgos, Member, IEEE, Rixin Lai, Student Member, IEEE, Yunqing Pei, Member, IEEE, Fei (Fred) Wang, Senior Member, IEEE, Dushan Boroyevich, Fellow, IEEE, and Josep Pou, Member, IEEE Abstract—This paper presents the equivalence between two- and three-level converters for Vienna-type rectifiers, proposing a simple and fast space vector modulator built on this principle. The use of this duality permits the simple compliance of all topological constraints of this type of nonregenerative three-level rectifier, enabling as well the extension of its operating range by the use of simpler two-level overmodulation schemes. The proposed algo- rithm is further simplified by deriving its carrier-based equivalent implementation, exploiting the direct correspondence existent between the zero-sequence vectors of Vienna-type rectifiers and the zero state vectors of two-level converters. As a result, the proposed algorithm is also capable of controlling the rectifier neutral point voltage. This feature makes it attractive as well for neutral-point-clamped inverters, complementing previous carrier-based space vector modulators developed for these con- verters. A complete experimental evaluation using a 2 kW digital signal processor–field programmable gate array controlled Vi- enna-type rectifier is presented for verification purposes, asserting the excellent performance attained by the proposed carrier-based space vector modulator. Index Terms—Carrier, pulsewidth modulation (PWM), space vector modulation (SVM), three-level converter, Vienna rectifier. I. INTRODUCTION A. Vienna Rectifier, Equivalent Topologies, and Space Vector Modulation T HE Vienna rectifier was developed and proposed with thepurpose of maximizing the power density of three-phase power supplies for telecommunication applications [1]–[3]. Providing power factor correction (PFC) for diode rectifiers, Manuscript received July 18, 2007; revised October 14, 2007. Published July 7, 2008 (projected). This work was supported by the Engineering Research Center Shared Facilities, the National Science Foundation under NSF Award Number EEC-9731677, and the CPES Industry Partnership Program. Recom- mended for publication by Associate Editor P. Barbosa. R. Burgos, R. Lai, F. Wang, and D. Boroyevich are with the Center for Power Electronic Systems (CPES), Virginia Polytechnic Institute and State University, Blacksburg, VA 24061 USA (e-mail: rolando@vt.edu; rp.burgos@ieee.org). Y. Pei is with the School of Electrical Engineering, Xi’an Jiaotong University, Xi’an 710049, China. J. Pou is with the Terrassa Industrial Electronics Group (TIEG), Universitat Politecnica de Catalunya, Catalunya 08222, Spain. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TPEL.2008.925180 its specific circuit topology evolved from nonregenerative two-level and three-level rectifiers [4]–[9], where together with the latter ones forms a family of functionally equivalent circuit topologies [8]–[11]. More than a decade later and thanks to their notable performance and the advancements on semiconductors devices, magnetic materials, capacitor and cooling technolo- gies, these rectifiers remain as one of the preferred choices when power density is a design objective [12], [13]. As such, aircraft applications where both power density and specific weight are of utmost importance have become a potential user of this type of nonregenerative three-level rectifier [14], [15], which has also been recently considered for industrial motor drives, power supplies and active filters [13], [16]–[18]. For power supplies in the several kilowatts range, Vi- enna-type rectifiers can employ switching frequencies well above 100 kHz depending on specific power quality and elec- tromagnetic compatibility (EMC) requirements [13]–[15]. For this reason hysteresis or sinusoidal-pulsewidth modulation (PWM) modulators are used since they can be implemented by simple analog circuitry [3], [19], [20]. Along these lines several alternative methods have been proposed seeking to improve the converter performance without using digital processors, among others one-cycle control and multiplier-less analog controls [21], [22]. And yet, though limited in capabilities, advanced analog control schemes for specific operating conditions have been successfully implemented [23], [24]. For applications optimized for lower switching frequencies, controls by means of digital signal processors (DSP) and field programmable gate arrays (FPGA) may be readily employed for Vienna-type rectifiers [9], [15]–[18]. Motor drives are a good example of this since a single DSP can be used to control both rectifier and inverter stages. To take advantage of digital con- trols, several space vector modulation (SVM) algorithms have been proposed, exploring the boundaries and limitations of con- tinuous and discontinuous schemes [16], [25], [26]. However, the apparent complexity of its implementation has somewhat thwarted the usage of SVM, a consequence of the nonregen- erative nature of this type of three-level rectifier which requires corresponding line currents and phase voltages to have the same instantaneous polarity [20]. The neutral-point-clamped (NPC) three-level inverter on the contrary has none of the above con- straints [27]. Regarding the NPC inverter, significant work has been done on its modulation scheme since it has been an intrinsic lever in 0885-8993/$25.00 © 2008 IEEE Luli 高亮 Luli 高亮 Luli 高亮 Luli 高亮 BURGOS et al.: SPACE VECTOR MODULATOR FOR VIENNA-TYPE RECTIFIERS 1889 balancing the neutral point voltage of this converter. Both car- rier-based PWM [28]–[31] and SVM techniques have been used [32]–[35], although the latter has usually been finally imple- mented exploiting the equivalence with the former [34]–[41]. This equivalence however is not as straightforward and direct as in two-level converters where the relationship between car- rier-based PWM and SVM has been well established [42]–[44]. Specifically, some initial study showing this equivalence for NPC inverters was presented in [36], [37]-valid only at a single operating point. A more complete analysis and carrier-based SVM scheme was later presented for the three-level NPC in- verter in [38], and for four- and -level inverters in [39] and [40]. However, the analyses presented in [36] and [40] only con- sidered the case of equal time distribution between redundant vectors, and hence did not take into account the neutral point voltage balancing problem, essential for this type of topology. References [39], [40] correctly identified though the constraints added by the stacked carrier signals in the generation of the zero-sequence component on which the PWM and SVM equiv- alence is built. Only [41] has presented of late a theoretical analysis for -level inverters including the neutral point voltage balance, nonetheless veiled behind an intricate geometrical de- scription. Another relevant simplification of SVM in NPC converters is attained by exploiting their equivalence with two-level converters, as was shown in [45] and recently for th-order multilevel inverters in [46], [47]. This analogy is extended in this paper to Vienna-type rectifiers, and is used to identify the subset of space vectors active during each switching cycle, thus easily complying with all topological constraints associated to enforcing the equal polarity between corresponding line currents and voltages [48], [49]. The converter operating region is then extended by using a simple two-level overmodulation algorithm [50]. The equivalence with two-level converters is also used to show the functional correspondence between the redundant zero-sequence vectors of Vienna-type rectifiers and the zero state vectors of two-level converters. This duality is the basis of the proposed carrier-based SVM algorithm, and as such is used to derive its zero-sequence duty cycle generator. This is done by equating the relative conduction times of the zero-sequence vectors thus mirroring the zero vector control in two-level converters. As a result, the proposed algorithm is capable of controlling the neutral point voltage of the rectifier. This paper presents the complete, detailed derivation of the proposed algorithm together with a thorough experimental eval- uation using a 2 kW DSP–FPGA controlled Vienna-type recti- fier prototype. The algorithm is first developed in space vector terms exploiting the two-level and three-level converter equiv- alency, and then in terms of its carrier-based implementation, providing significant insight into this realization and its addi- tional usage for three-level NPC inverters. The results obtained verify the excellent capabilities of the proposed carrier-based SVM algorithm. II. ELECTRICAL STATES OF VIENNA-TYPE RECTIFIERS Fig. 1 shows the circuit schematic of the Vienna-type rectifier considered in this paper, comprised of a main diode bridge and three ac switches connecting the input phases to the dc-bus neu- tral point. The rectifier prototype built and used for evaluation of the proposed algorithm is rated at 2 kW, 60 V rms, 60 Hz, Fig. 1. Circuit schematic of Vienna-type rectifier topology considered in this paper. 200 V dc, and uses SiC Schottky diodes for the main bridge diodes and Si MOSFETs with their body diodes to implement the bidirectional switches. A digital controller built on a DSP (AD21160M SHARC) and FPGA (Xilinx XCV-400) architec- ture is used to implement the modulator and controls using a sampling frequency of 40 kHz. The boost inductors are 160 H rated at 2 kW, and the dc bus capacitors are 20 F rated at 450 V. This rectifier as a three-level topology has 25 valid electrical states of the following type: (1) In this paper, switching functions (for ) take values in representing the per unit voltage of the phase-leg with respect to the neutral point, and not the state of the corresponding bidirectional switch. These 25 states are a subset of the 27 states of the NPC inverter, since these topolo- gies have only one null or zero state. Per this switching function definition and Fig. 1, the rectifier phase to neutral point voltages under balanced steady state conditions are given by (2) These 25 states may be converted into the plane using the following space vector transformation (3) (4) so that the resultant space vectors have magnitude zero, one, , or two. Correspondingly, the maximum magnitude for a per unit sinusoidal voltage reference vector normalized to is , where is the modulation index 1 0 and amplitude of the phase duty cycles in abc-coordinates. The 25 space vectors labeled with their corresponding abc-coordinate state realization are shown in Fig. 2(a). A major constraint of this topology is that the phase to neutral point voltage can only be switched between the neutral point and the dc bus rail having polarity equal to that of the corre- sponding line current, that is when 0 or when 0 as shown in Fig. 1. This limits the number of active states that can be applied at any given time to a subset of eight vectors depending on the instantaneous polarity of the converter line currents, or equivalently depending on the sector where the line Luli 高亮 Luli 高亮 Luli 高亮 Luli 高亮 Luli 高亮 Luli 高亮 Luli 高亮 Luli 高亮 Luli 高亮 Luli 高亮 Luli 高亮 Luli 高亮 1890 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 23, NO. 4, JULY 2008 Fig. 2. Space vectors of Vienna-type rectifier: (a) 25 vectors labeled with their corresponding electrical state realization S = [S S S ]. (b) Space vector diagram illustrating the six Sectors {I, II,. . . ;VI} created by the loca- tion of the input current vector i , depicting as well the active voltage-vector hexagons and corresponding vectors for two different locations of i , Sectors I and IV, respectively. current vector lies in the plane. A total of six possible Sec- tors exist, {I, II, VI}, which activate six different set of space vectors forming a hexagonal region. Fig. 2(b) shows as example the cases when the current space vector lies in Sectors I and IV, respectively. This active hexagon demarcates the valid and realizable location for the reference voltage vector. As shown in this figure, the active vectors in every case correspond to the two realizations of the redundant vector connecting the origin of the plane to the center of the hexagonal region, and to the six vectors forming this hexagonal region (including the zero vector). Notice that due to the current polarity restrictions, only one of the two realizations for the other two redundant space vectors forming the hexagon are active during this time; namely and in Sector I, and and in Sector IV as shown in Fig. 2(b). III. EQUIVALENCE BETWEEN TWO-LEVEL AND THREE-LEVEL SPACE VECTOR MODULATION Fig. 3 shows the space vectors of a two-level voltage source converter in the plane consisting of six active vectors and two zero vectors . The active vectors di- vide this hexagon into six Sectors, {I, II, VI}, which de- limit the possible location of the reference voltage vector without requiring overmodulation. For either SVM or its car- rier-based implementation the sequence of states applied during a switching cycle is (5) for odd sectors, or with reversed active vector transitions for even sectors, where and correspond to the vectors leading and lagging [42], [43]. The generic volt-second balance during a switching cycle with controlled relative conduction times of the zero vectors and is then given by (6) where corresponds to the switching period, , , and , to the conduction times of the respective space vectors, and to the controlled time ratio between vectors and [44]. For Vienna-type rectifiers as well as for the NPC converter topology, SVM is implemented by synthesizing the reference vector using the three nearest vectors forming a triangle around Fig. 3. Space vector diagram of two-level voltage-source converter showing: six Sectors {I, II,. . . ;VI}, six active vectors fv ; v ; . . . ; v g, two zero vectors fv ; v g, and the synthesis of the voltage reference vector v in Sector I, in- dicating the corresponding lagging and leading vectors v and v ; v and v , respectively. Fig. 4. Two- and three-level space vector equivalency: (a) synthesis of v in three-level SVM diagram using three adjacent space vectors forming a triangle around it (v , v and v ) and (b) synthesis of equivalent reference voltage vector v in two-level equivalent space vector diagram for Vienna-type rectifiers. it. For Vienna-type rectifiers, restrained to the eight active vec- tors depending on the current vector location, one of the three nearest vectors forming the triangle in question is always the re- dundant vector pointing to the center of the active hexagon. If this redundant vector is named , the volt-second balance for this type of rectifier can be expressed as (7) where and correspond to the vectors lagging and leading as shown in Fig. 4(a). Since has two switching state real- izations as described in Section II, (7) may be rewritten by split- ting into its two realizations, namely and , and using a constant as the time ratio between them as (8) These two vectors are named and given that injects current into the dc-link neutral point, that is in Fig. 1, while draws current from it , resulting in the re- spective charge and discharge of the dc-link midpoint voltage. The volt-second balance (8) is by inspection equivalent to the expression given in (6). It is apparent then that the role of the zero vectors in two-level converters-which shape the zero-se- quence voltage, and that of the zero-sequence vectors in Vi- enna-type rectifiers is identical. Now, since (9) and (10) Luli 高亮 Luli 高亮 Luli 高亮 Luli 高亮 Luli 高亮 Luli 高亮 Luli 注释 为什么取1/2 BURGOS et al.: SPACE VECTOR MODULATOR FOR VIENNA-TYPE RECTIFIERS 1891 when 2, i.e., the sought operating conditions, (8) may be rewritten as (11) Rearranging terms in this expression yields (12) where may be understood as an origin translation in the plane. This defines a new set of equivalent two-level vectors denoted by the superscript in the following, with which the volt-second balance (12) may be rewritten as (13) This shows that the volt-second balance of Vienna-type rec- tifiers is identical to that of two-level converters after applying an origin translation of . This is verified by replacing into the two-level volt-second balance expression (6) as (14) Fig. 4(b) illustrates this concept, depicting the two-level syn- thesis of the equivalent reference voltage vector . The equiv- alence is finally complete by stating that (15) As mentioned in Section I, a similar duality has been estab- lished for the NPC converter [45]–[47]; however, in the case of this converter the relationship is more involved since depending on the magnitude and location of the reference voltage vector more than one set of redundant vectors of the converter might be active (up to three for low modulation indexes), in which case the correspondence with two-level converters is not one-to-one as it is for Vienna-type rectifiers regardless of the reference vector location or magnitude. IV. SPACE VECTOR MODULATION SCHEME The space vector modulator for Vienna-type rectifiers may be easily implemented by exploiting the equivalence with two-level converters. First, the sector where the current space vector lies is determined using a simple algorithm developed for the space vector modulation of two-level current-source converters that enables the straightforward sector identification without using trigonometric relationships [48]. Once the cur- rent vector is located, the rectifier active hexagon is uniquely determined together with all its associated voltage vectors, including the three vectors closest to , namely and and the redundant zero-sequence vector . The origin translation can then be applied generating the two-level equivalent reference voltage vector and the equivalent vectors and . The location of the new reference vector in the two-level space vector diagram is determined similarly to the location of the current vector but by applying the voltage-source converter equivalent algorithm [49]. The respective conduction times and for the equivalent vectors and are then determined by (16) Once the conduction times are known the corresponding three-level vectors , , and can be applied for , and using (15) and the sequence described by (8). An advantage of this two-level equivalent approach is that the main requirement for the modulation of Vienna-type rectifiers may be easily addressed, i.e., that the voltage reference vector lie within the active hexagon. This can be achieved by simply limiting to lie within the sinusoidal region of the two-level space vector diagram, or by using any overmodulation technique for two-level converters which has the advantage of extending the converter operating region by 10%. In this case, a fast algo- rithm based on if–then rules covering both overmodulation and bang-bang regions as presented in [50] was used. This algorithm modifies the equivalent two-level reference keeping it re- strained to the voltage hexagon defined by the location of the current vector while following the actual reference as close as possible. Fig. 5 shows the active voltage hexagon and the linear and overmodulation regions as well as the algorithm in question. Naturally, this approach also covers the actual overmodulation region of Vienna-type rectifiers, that is when lies outside both the active hexagon and the three-level space vector region. V. PROPOSED CARRIER-BASED SPACE VECTOR MODULATOR A. Basis of P