5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PRELIMINARY
ATHEROS CONFIDENTIAL
AP121 802.11b/g/n 1x1 2.4GHz Access Point
AR9331 4LAN + 1WAN 10/100 Router Reference Design
JC AP121-010245-01951-010
DATE
March, 24, 2010
REVISION NUMBER INITIALS DESCRIPTION
AP121-245-01951-062
1.Delete DC1.2V option.245-01951-020
2.Delete R3, R210, R206, C158, C159, C165, C166, R207, R11, R209, C35
3.Change C3 from 27pF to 10pF, change C4 from 33pF to 10pF, change C66 C67 from 1.5pF to 10pF,
change C65 from 1.2pF to 1pF, change C68 C69 C70 C71 from 1.2pF to 2pF, change L1 L2 from 3nH to 2nH, change L18 L20 from 1.5nH to 2.0nH,
change C97 from 2pF to 1pF, change C177 from No Load to 0.75pF, change C89 C90 from 4.7pF to 10pF, change L5 L6 from 2.2nH to 2.0nH,
change C91 C92 from 1.5pF to 1.2pF, change C93 from No Load to 1pF, change L14 from 4.7uH to 15uH, change L22 from 4.7uH to 10uH,
change C157 C143 from 390pF to 3.9nF, change R201 from No Load to 6.81K, change R166 from 16.2K to 26.1K, change R168 from 5.1K to 10K,
change C144 from 10pF to 10nF, change R149 from 5.1K to 10K, change C167 from 33pF to No Load, change C27 from 0.01uF to 0.1uF,
change R9 from 10K to No Load, change R12 from 100K to No Load, change C55 from 1uF to 22uF, change C152 from 10uF to 22uF,
change C72 from No Load to 1pF, change C30 from 4.7uF to 10uF, change R5 from 56K to 10K
4.Add C203 2pF, R201 12K, C168 No Load, R215 56K, 1.2V option
JCJune, 24, 2010
1.Add 1.2V option
JC245-01951-030June, 28, 2010
2.Change C14 C15 C19 C20 from 0.01uF to No Load, change C54 C21 from 0.01uF to 1uF, change C32 from 0.01uF to 470pF, change R12 from No Load to 1uF
change C65 from 1.2pF to 0.75pF, change C203 from 2pF to 1.5pF, change C72 from 1pF to No Load, change C177 from 0.75pF to 0.5pf,
change C91 C92 from 1.2pF to 1pF,
245-01951-031 JC
1.Change R4 R64 R65 R189 R194 R196 R198 R214 from 56K to 10K, change R188 from 56K to No Load, change R187 from No Load to 10k,
change R12 from 1uf to 0.22uf, change R215 from 56K to No Load, change C68 C69 from 2.0pf to 1.8pf, change C65 from 0.75pf to 0.5pf,
change L17 L19 from 4.7nh to 3.6nh, change C97 from 1pf to 1.5pf, change L5 L6 from 2.0nh to 2.2nh
2.Remove C93 C117
August, 2, 2010
1.Add L21, C204August, 30, 2010 245-01951-040 JC
2.Remove C34
3.Change R92 from 330 ohm to 270 ohm, change C187 from 10K to No Load, change C188 from No Load to 10K, change C74 from 10pF to 0.75pF,
change C75 from No Load to 6.8nH, change C94 from No Load to 0.5pF, change C95 from 10pF to 2.7nH
245-01951-041October, 1, 2010 JC 1.Change C65 from 0.5pf to No Load, C68 C69 from 1.8pf to 1pf, C70 C71 from 2pf to 1pf, C72 from No Load to 1pf, C97 from 1.5pf to 1.2pf
C26 from0.01uf to No Load, L1 L2 from 2nh to 2.2nh, L17 L19 from 3.9nh to 4.7nh, L5 L6 from 2.2nh to 2.7nh
1.Add R202 10k, R203 No Load, change C97 from 1.2pf to 1.5pf, change L21 from 10nh to 0ohm, change C204 from 0.1uf to 1nf,
change C26 from No Load to 0.01uf, change R5 from 10K to No Load, change R215 from No Load to 10K, change JP1 to No Load, change J2 to No Load
JC245-01951-050October, 15, 2010
1.Del L21, TP8, TP10, TP11, TP12, TP13, C176, C177, C20
2.Change C54 from 1uf/0402 to 10pf/0201, change C97 from 1.5pf to 1.2pf, change C144 C129 from 0.01uf to 0.1uf, change C143 C157 from 3900pf to 3300pf,
change R201 from 6.18K to 12K, change R210 from 12K to 20K, change R166 from 26.1K to 71.5K, change R168 from 10K to 22K, L17 L19 from 4.7uH to 3.9nH
change R148 from 45.3K to 62K, change R149 from 10K to 11.8K, Change L15 L16 from 10nH to 4.7nH, change C68 C69 C70 C71 C91 C92 from 1pF to 1.2pF,
change C89 C90 from 10pF to 3.9pF, change C21 from 1uF to 1nF, change C93 from No Load to 0.75pF, change C204 from 1nF to 1uF,
change L18 L20 from 2.0nH to 1.8nH, change C181 C182 from 10pF to 0.1uF
3.Add C31, C34, C35, L21, L23
245-01951-060 JCFebruary, 14, 2011
1. update U1 symbolJC245-01951-061April, 14, 2011
1. update no USB supportJC245-01951-062May, 9, 2011
Size
DWG NO
Rev Sheet of
Title
Date
Title and Reversion History
Atheros Communications, Inc.
Thursday, August 02, 2012 1 8C
5480 Great America Parkway
Santa Clara, CA 95054
000Size
DWG NO
Rev Sheet of
Title
Date
Title and Reversion History
Atheros Communications, Inc.
Thursday, August 02, 2012 1 8C
5480 Great America Parkway
Santa Clara, CA 95054
000Size
DWG NO
Rev Sheet of
Title
Date
Title and Reversion History
Atheros Communications, Inc.
Thursday, August 02, 2012 1 8C
5480 Great America Parkway
Santa Clara, CA 95054
000
MK3
MARK40
MK4
MARK40
MK5
MARK40
MH1
MPTH_276D120
MK6
MARK40
MH5
MPTH_276D120
MH2
MPTH_276D120
MH3
MPTH_276D120
MH4
MPTH_276D120
MK1
MARK40
MK2
MARK40
Un
Re
gis
te
re
d
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Hornet
AR9331
Flash
4MByte
DDR1
16MByte
Ethernet
10/100
LAN Port
Ethernet
10/100
WAN Port
TRX
DISCRETE
BALUN
RX
DISCRETE
BALUN
TRX
MATCH
CIRCUIT
RX
MATCH
CIRCUIT
ANTENNA 0
ANTENNA 1
DDR
PNP LDO
2.0V
PNP LDO
25MHz
XTAL
Jumper
Start SW
Reset
SW
PRELIMINARY
ATHEROS CONFIDENTIAL
DC12~24V
INPUT
SWITCH
REGULATOR
to 3.3V
AP121-245-01951-062
JTAG
(Option)
UART
(Option)
SWITCH
REGULATOR
to 5V (for USB)
3.3 to 1.2V
(internal SW Regulator)
For DDR1
For Ethernet
transformer
3.3 to 2.5V
(Internal LDO
for GPIO)
OPTION SWITCH
REGULATOR
to 1.2V
USB
Connector
USB WIFI
(Option)
Size
DWG NO
Rev Sheet of
Title
Date
AP121 Block Diagram
Atheros Communications, Inc.
Monday, August 06, 2012 2 8C
5480 Great America Parkway
Santa Clara, CA 95054
000Size
DWG NO
Rev Sheet of
Title
Date
AP121 Block Diagram
Atheros Communications, Inc.
Monday, August 06, 2012 2 8C
5480 Great America Parkway
Santa Clara, CA 95054
000Size
DWG NO
Rev Sheet of
Title
Date
AP121 Block Diagram
Atheros Communications, Inc.
Monday, August 06, 2012 2 8C
5480 Great America Parkway
Santa Clara, CA 95054
000
Un
Re
gis
te
re
d
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
near
pin A30
near
pin A33
near
pin A38
JUMPSTART
SW
0805 near
pin B39
near
pin A55
near
pin 49
Note: Pin name is 0.99 (20100316)
CK_P, DQS_0, DQS1 short together if use SDRAM.
Y1:TXC9B25000406
Use DDR1, XLNA
=Low
close to A48
With ICE, JUMPSTART=High;
Without ICE, JUMPSTART=Low.
near
pin B67
USB_Port_1
USB---按PCB阻抗90 OHM
,差分等长处理
Route USB DP/DM as 90 ohm differential,
match lengths to within +/-5mils
Note: Hornet Digital IO pads(Flash, UART,JTAG, LED) are 2.5V CMOS logic,
don't apply >2.9V on it otherwist might damage the IC.
JTAG
near
pin A84
near
pin B26
near
pin B31
near
pin B36
near
pin A61
near
pin A70,A71
near
pin B55
near
pin B69
near
pin B42
near
pin B60,B61,B62
near
pin A26
near
pin B1
near
pin A12
near
pin A19
near
pin A5
near
pin B13
RESET
SW
Use DDR1,
RESET=High
TP7和TP6两个测试点要紧挨着
USB+
USB-
JUMPSTART
RESET
JTAG_TDO
JTAG_TDI
JTAG_TCK
JTAG_TMS
XTALI
XTALO
X
T
A
LI
X
T
A
LO
RESET_B
JUMPSTART
USB+
USB-
JTAG_TDI
JTAG_TMS
JTAG_TDO
JTAG_TCK
RESET
USB+
USB-
UART-TX
UART-RX
UART-TX
UART-RX
VDD_DDR
VDD25
VDD25
AVDD12
VDD25
VDD12_RF
VDD33
VDD33_RF
DVDD12
DVDD12
2.0V
VDD33
VDD33
DVDD12
VDD33
VDD33
VDD25VDD25
AVDD12
AVDD12
DVDD12
AVDD12
DVDD12
5V
DVDD12
AVDD12AVDD12 DVDD12
VDD33_RF
VDD_DDR VDD12_RF
VDD33
VDD25
VDD25
VDD33P3_RX- 6
P3_RX+ 6
P3_TX- 6
P3_TX+ 6
P4_TX- 6
P4_TX+ 6
P4_RX- 6
P4_RX+ 6
ADDR_04
ADDR_14
ADDR_24
ADDR_34
ADDR_44
ADDR_54
ADDR_64
ADDR_74
ADDR_84
ADDR_94
ADDR_104
ADDR_114
ADDR_124
DATA_04
DATA_14
DATA_24
DATA_34
DATA_44
DATA_54
DATA_64
DATA_74
DATA_84
DATA_94
DATA_104
DATA_114
DATA_124
DATA_134
DATA_144
DATA_154
DQM_04
DQS_04
DQS_14
DQM_14
CK_N4
CK_P4
CKE_14
BA_14
BA_04
CS_L4
RAS_L4
CAS_L4
WE_L4
SPI_MISO 4
SPI_CS 4
SPI_CLK 4
SPI_MOSI 4
GPIO1 6,8
GPIO13 6,8
LDO_OUT7
RFOUTP 5
RFOUTN 5
RFIN1N 5
RFIN1P 5
LED0 6
CTRL20 7
SW_REG_OUT7
VDD12_PMU7
RESET 8
LED5 6
Flash_WP 4
LED7 6
P2_RX- 6
P2_RX+ 6
P2_TX- 6
P2_TX+ 6
WDI 6,8
LED4 6
LED6 6
WD_EN 8
Size
DWG NO
Rev Sheet of
Title
Date
Hornet
Atheros Communications, Inc.
Thursday, August 02, 2012 3 8Custom
5480 Great America Parkway
Santa Clara, CA 95054
000Size
DWG NO
Rev Sheet of
Title
Date
Hornet
Atheros Communications, Inc.
Thursday, August 02, 2012 3 8Custom
5480 Great America Parkway
Santa Clara, CA 95054
000Size
DWG NO
Rev Sheet of
Title
Date
Hornet
Atheros Communications, Inc.
Thursday, August 02, 2012 3 8Custom
5480 Great America Parkway
Santa Clara, CA 95054
000
TP11
C7
103/25V
C0402
C43
1uF/6.3V
C0402
C2
10pF/50V
C0402
C37
103/25V
C0402
C11
103/25V
C0402
C16 1uF/6.3V C0402
C41 103/25V
C0402
C29
103/25V
C0402
L17 3nH
L0402
1 2 R68 10R/5%
R0402
C24
103/25V
C0402
C8
103/25V
C0402
C46
NC C0402
R7
1K/5%
R0402
C4
104/16V
C0402
TP21
R9
NC
R0402
C12
103/25V
C0402
C25
103/25V
C0402
C36
103/25V
C0402
R11
10K/5%
R0402
TP10
1
TP41
ESD2
0402ESDA-09-3pF-3.3V
D0402
U15
RL-UM02BS
MD_WIFI_6P_UM02BS_20X20_H1D8
RFGND
1
ANT
2
3.3V
3D-
4D+
5GND
6
C17
103/25V
C0402
V D- D+ G
USB_TYPE_A_1J1
JUSB_4P_G2_H7
G1
1 2 3 4
G2
R67 10R/5%
R0402
C31
103/25V
C0402
TP51
ESD1
0402ESDA-09-3pF-3.3V
D0402
C3
NC
C0402
TP16
TP40
1
R60 4.7K/1%
R0402
C13
103/25V
C0402
TP11
1
C40
103/25V
C0402
C178
1uF/6.3V
C0402
C26
103/25V
C0402
R13 10K/5% R0402
R5 6.19K/1%
R0402
C18
103/25V
C0402
C5
224/16V
C0402
R6 2.43K/1%
R0402
U1
IMP809-2.63V
SOT23
V
C
C
3
RESET
2
G
N
D
1
R8 NC
R0402
TP12
1
C34
103/25V
C0402
R61
15K/5%
R0402
R12 0R/5%
R0402
Y1
25MHz
OSC3225
1
12
2
3
3
4
4 R1
10K/5%
R0402
C14
103/25V
C0402
C19
103/25V
C0402
C177
NC
C0402
TP13
1
C27
103/25V
C0402
R14 NC R0402
C30 NC
C0402
C42
103/25V
C0402
C9
NC
C0402
C39
103/25V
C0402
JP1
SIP_3P_SMD
1 2 3
3
R2 10R/5%R0402
TP14
1
C175 8.2pF
C0402
U2
AR9331
QFN_144P_G1_12X12_0D5_H0D9
VDD_DDR
B1
DDR_A_2
A3
DDR_A_1
B2
DDR_A_0
A4
DDR_A_10
B3
VDD12
A5
DDR_BA_1
B4
DDR_BA_0
A6
DDR_CS_L
B5
DDR_RAS_L
A7
DDR_CAS_L
B6
DDR_WE_L
A8
DDR_DQM_0
B7
DDR_DQS_0
A9
DDR_DATA_7
B8
DDR_DATA_6
A10
DDR_DATA_5
B9
DDR_DATA_4
A11
DDR_DATA_3
B10
VDD_DDR
A12
DDR_DATA_2
B11
DDR_DATA_1
A13
DDR_DATA_0
B12
DDR_DQM_1
A14
VDD12
B13
DDR_DQS_1
A15
DDR_DATA_8
B14
DDR_DATA_9
A16
DDR_DATA_10
B15
DDR_DATA_11
A17
DDR_DATA_12
B16
DDR_DATA_13
A18
DDR_DATA_14
B17
VDD_DDR
A19
DDR_DATA_15
B18
LDO_OUT
A20
VDD33
B19
V
D
D
3
3
B
2
0
S
W
_
R
E
G
_
O
U
T
A
2
5
V
D
D
1
2
_
P
M
U
B
2
1
V
D
D
1
2
A
2
6
G
P
IO
2
3
/S
P
D
IF
_
O
B
2
2
G
P
IO
2
0
/I2
S
_
S
D
A
2
7
G
P
IO
1
9
/I2
S
_
W
S
/S
L
IC
_
F
S
_
O
B
2
3
G
P
IO
1
8
/I2
S
_
C
K
/S
L
IC
_
L
K
A
2
8
G
P
IO
2
2
/I2
S
_
M
IC
IN
/S
L
IC
_
D
A
T
A
_
I
B
2
4
G
P
IO
2
4
A
2
9
G
P
IO
2
1
/I2
S
_
M
C
K
/S
L
IC
_
D
A
T
A
_
O
B
2
5
V
D
D
2
5
A
3
0
V
D
D
1
2
B
2
6
R
X
_
P
4
A
3
1
R
X
_
N
4
B
2
7
T
X
_
P
4
A
3
2
T
X
_
N
4
B
2
8
V
D
D
2
5
A
3
3
T
X
_
P
3
B
2
9
T
X
_
N
3
A
3
4
R
X
_
P
3
B
3
0
R
X
_
N
3
A
3
5
V
D
D
1
2
B
3
1
R
X
_
P
2
A
3
6
R
X
_
N
2
B
3
2
T
X
_
P
2
A
3
7
T
X
_
N
2
B
3
3
V
D
D
2
5
A
3
8
T
X
_
P
1
B
3
4
T
X
_
N
1
A
3
9
R
X
_
P
1
B
3
5
R
X
_
N
1
A
4
0
V
D
D
1
2
B
3
6
R
X
_
P
0
A
4
1
R
X
_
N
0
B
3
7
T
X
_
P
0
A
4
2
T
X
_
N
0
B
3
8
VDD25
B39RBIAS
A47VDD12
B40AVDD20
A48CTRL20
B41LDO25_OUT
A49VDD33
B42USB_DM
A50USB_DP
B43GPIO26/LED8
A51GPIO27/LED7
B44GPIO8/JTAG_TMS/I2S_SD
A52USB_VDD12
B45JTAG_TCK
A53GPIO6/JTAG_TDI/I2S_CK
B46GPIO7/JTAG_TDO/I2S_WS
A54VDD12
B47VDD25
A55GPIO11/I2S_MCK/JS/UART_RTS
B48GPIO12/I2S_MICIN/UART_CTS
A56GPIO2/SPI_CS_0
B49GPIO4/SPI_MOSI
A57GPIO5/SPI_MISO
B50VDD12
A58GPIO3/SPI_CLK
B51ANTB
A59ANTA
B52ANTC
A60ANTD
B53VDD12_BB
A61XPABIAS
B54RFOUTN
A62VDD33_RF
B55RFOUTP
A63VDD12_RF
B56RFIN1N
A64
R
F
IN
2
N
A
6
9
B
IA
S
R
E
F
B
5
9
V
D
D
1
2
_
S
Y
N
T
H
A
7
0
V
D
D
3
3
_
S
Y
N
T
H
B
6
0
V
D
D
1
2
_
P
L
L
A
7
1
V
D
D
3
3
_
P
L
L
B
6
1
R
E
S
E
T
_
L
A
7
2
V
D
D
3
3
_
X
T
A
L
B
6
2
X
T
A
L
I
A
7
3
X
T
A
L
O
B
6
3
G
P
IO
2
8
/X
L
N
A
A
7
4
G
P
IO
1
7
/L
E
D
6
B
6
4
G
P
IO
1
6
/L
E
D
5
A
7
5
G
P
IO
1
5
/L
E
D
4
B
6
5
G
P
IO
1
4
/L
E
D
3
A
7
6
G
P
IO
1
3
/L
E
D
2
B
6
6
G
P
IO
1
/L
E
D
1
A
7
7
V
D
D
2
5
B
6
7
G
P
IO
0
/L
E
D
0
A
7
8
G
P
IO
9
/U
A
R
T
_
S
IN
/S
P
I_
C
S
_
1
B
6
8
G
P
IO
1
0
/U
A
R
T
_
S
O
U
T
/S
P
I_
C
S
_
2
A
7
9
V
D
D
1
2
B
6
9
D
D
R
_
A
_
4
A
8
0
D
D
R
_
A
_
5
B
7
0
D
D
R
_
A
_
6
A
8
1
V
D
D
_
D
D
R
B
7
1
D
D
R
_
A
_
7
A
8
2
D
D
R
_
A
_
8
B
7
2
D
D
R
_
A
_
9
A
8
3
D
D
R
_
A
_
1
1
B
7
3
V
D
D
_
D
D
R
A
8
4
D
D
R
_
A
_
1
2
B
7
4
D
D
R
_
C
K
E
A
8
5
D
D
R
_
C
K
_
P
B
7
5
D
D
R
_
C
K
_
N
A
8
6
D
D
R
_
A
_
3
B
7
6
G
1
G
1
RFIN1P
A65
R
F
IN
2
P
A
6
8
C6
NC
C0402
C33
103/25V
C0402
C28
103/25V
C0402
R15 10K/5% R0402
C15
102/50V
C0402
C44
10uF/6.3V
C0603
R82 0R/5%
R0402
R4 10R/5%R0402
C176
1pF/50V
C0402
TP15
1
J7
WAFER-2.0mm-3PIN
JWAFER_3P_8X4D35_2_H5D9
1
1
2
2
3
3
R10
NC
R0402
ANT2
ANT-STAMP-CUS126
JCON_3P_COAXIAL_H2D8_ST
1
23
C38
103/25V
C0402
C22
103/25V
C0402
LU1
NC/CM Choke
L2012_4P_CHOKE_H1D2
1 4
32
SW1
KEY_4P
KEY_4P_TS1100E_H1D9
1 3
42
R16 10K/5% R0402
C76
22uF/25V
C0805
C20
103/25V
C0402
TP61
C179
10uF/6.3V
C0603
C45
104/16V
C0402
C32
103/25V
C0402
C21
22uF/25V
C0805
C1
10pF/50V
C0402
C10
103/25V
C0402
TP31
R3
NC
R0402
C35
10uF/6.3V
C0603
F1
FUSE/1A
F0805
2 1
C23
103/25V
C0402
TP71Un
Re
gis
te
re
d
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR1(default is loaded, 16MByte)
GPIO24 controls Write_Protect.
Memory bus clock speed and voltage:
SDRAM: 166MHz, 3.0V
DDR1:200MHz, 2.5V
DDR2:200MHz, 1.8V
Flash memory footprint is SO8-200mil
R69,R68 are voltage divider to
reduce the logic level to 2.5V.
close
U3 pin 15
close
U2 pin 14
close
U2 pin 27
close
U2 pin 43
close
U2 pin 49
close
U2 pin 1
close
U2 pin 3
close
U2 pin 9
R49,R53靠近主芯片放置
20120806:change to MX25L3205DM2I-12G
VDD_DDR
VDD25
VDD33
VDD_DDR
VDD_DDR
ADDR_12 3
DQS_1 3
DQS_0 3
CK_N3
DATA_0 3
DATA_1 3
DATA_2 3
DATA_3 3
DATA_4 3
DATA_5 3
DATA_6 3
DATA_7 3
DATA_8 3
DATA_9 3
DATA_10 3
DATA_11 3
DATA_12 3
DATA_13 3
DATA_14 3
DATA_15 3
CK_P3
CS_L3
WE_L3
CKE_13
RAS_L3
CAS_L3
ADDR_03
ADDR_13
ADDR_23
ADDR_33
ADDR_43
ADDR_53
ADDR_63
ADDR_73
ADDR_83
ADDR_93
ADDR_103
ADDR_113
BA_13
BA_03
SPI_MISO 3
Flash_WP3 SPI_CLK 3
SPI_MOSI3
SPI_CS3
DQM_1 3
DQM_0 3
Size
DWG NO
Rev Sheet of
Title
Date
AP121 Memory
Atheros Communications, Inc.
Monday, August 06, 2012 4 8Custom
5480 Great America Parkway
Santa Clara, CA 95054
000Size
DWG NO
Rev Sheet of
Title
Date
AP121 Memory
Atheros Communications, Inc.
Monday, August 06, 2012 4 8Custom
5480 Great America Parkway
Santa Clara, CA 95054
000Size
DWG NO
Rev Sheet of
Title
Date
AP121 Memory
Atheros Communications, Inc.
Monday, August 06, 2012 4 8Custom
5480 Great America Parkway
Santa Clara, CA 95054
000
R22 22R/5% R0402
R48 1K/5%
R0402
R33 22R/5% R0402
R27 22R/5% R0402
C54
103/25V
C0402
R29 22R/5% R0402
R45 22R/5% R0402
R18 22R/5% R0402
R30 22R/5% R0402
R51
3K/5%
R0402
C55
103/25V
C0402
R49 22R/5%R0402
C58
102/50V
C0402
R35 22R/5% R0402
U3
SDRAM-2MX4BX16
SO_66P_22D22X11D76_0D65_H1D2
DQ0
2
DQ1
4
DQ2
5
DQ3
7
A0
29
DQ4
8
A1
30
DQ5
10
A2
31
DQ6
11
A3
32
DQ7
13
A4
35
A5
36
A6
37
A7
38
A8
39
A9
40
A10
28
A11
41
V
S
S
Q
6
V
D
D
Q
3
V
D
D
1
V
D
D
Q
9
V
S
S
Q
12
V
D
D
Q
15
CS
24
LDQS
16
V
D
D
18
CKE
44
NC
17
BA0
26
BA1
27
V
D
D
33
V
S
S
34
UDQS
51
WE
21
CAS
22
CLK
46
V
S
S
48
LDM
20
RAS
23
V
S
S
Q
52
NC
14
DQ8
54
DQ9
56
V
D
D
Q
55
DQ10
57
V
S
S
Q
58
DQ11
59
DQ12
60
V
D
D
Q
61
DQ13
62
DQ14
63
V
S
S
Q
64
DQ15
65
V
S
S
66
CLK
45
UDM
47
NC
25NC
19
NC
42
NC
50NC
43
NC
53
VREF
49
R57
4.7K/1%
R0402
R20 22R/5% R0402
R46 22R/5% R0402
R28 22R/5% R0402
R59
10K/5%
R0402
C56
103/25V
C0402
R54 22R/5% R0402
R47 22R/5% R0402
R50
NC
R0402
R37 22R/5% R0402
R32 22R/5% R0402
U4
MX25L1605DM2I-12G
SO_8P_7D9X5D2_1D27_H2D2
CS
1
SI/SIO0
5
SO/SIO1
2
SCLK
6
V
C
C
8
HOLD
7
WP/ACC
3
G
N
D
4
R58
10K/5%
R0402
R31 22R/5% R0402
R26 22R/5% R0402
R39 22R/5% R0402
R52 NC R0402
C57
10uF/6.3V
C0603
R53 22R/5%
R0402
R34 22R/5% R0402
C50
103/25V
C0402
R56 22R/5% R0402
R21 22R/5% R0402
R55 4.7K/1%
R0402
C47 104/16V
C0402
C49
103/25V
C0402
R36 22R/5% R0402
C48
NC
C0402
R17 22R/5% R0402
C51
103/25V
C0402
R42
10K/5%
R0402
R19 22R/5% R0402
R38 22R/5% R0402 R43
10K/5%
R0402
C52
103/25V
C0402
R24 22R/5% R0402
R23 22R/5% R0402
R40 22R/5% R0402
R44
NC
R0402
C53
103/25V
C0402
R25 22R/5% R0402
R41 22R/5% R0402
Un
Re
gis
te
re
d
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
R76 & R77
share 1 pad
A
N
T
0
L15, L16 recommend useing low DCR
Psat power current 150mA~180mA
VDD33
VDD33
RFOUTP3
RFOUTN3
RFIN1P3
RFIN1N3
Size
DWG NO
Rev Sheet of
Title
Date
AP121 RF
Atheros Communications, Inc.
Thursday, August 02, 2012 5 8Custom
5480 Great America Parkway
Santa Clara, CA 95054
000Size
DWG NO
Rev Sheet of
Title
Date
AP121 RF
Atheros Communications, Inc.
Thursday, August 02, 2012 5 8Custom
5480 Great America Parkway
Santa Clara, CA 95054
000Size
DWG NO
Rev Sheet of
Title
Date
AP121 RF
Atheros Communications, Inc.
Thursday, August 02, 2012 5 8Custom
5480 Great America Parkway
Santa Clara, CA 95054
000
L8 1.8nH
+/-0.1NH L0402
L10 1.8nH
+/-0.1NH L0402
C61
1.5pF/50V
C0402
C69 10pF/50V
C0402
C65
104/16V
C0402
ANT1
ANT-STAMP-CUS126
JCON_3P_COAXIAL_H2D8_ST
1
2 3
C72
NC
C0402
C74
22uF/25V
C0805
C73
1.2pF/50V
C0402
C59
104/16V
C0402
C71
1pF/50V
C0402
L7 3.9nH
+/-0.1NH L0402
L9 3.9nH
+/-0.1NH L0402
L6
6.8nH
+/-0.1NH
L0402
C63
1.2pF/50V
C0402C75
22uF/25V
C0805
C68 1.2pF/50V
C0402
C62
NC
C0402
L2 2.2nH
+/-0.1NH
L0402
C60 10pF/50V
C0402
L1
4.7nH
+/-0.1NH
L0402
C67 1.2pF/50V
C0402
L3
4.7nH
+/-0.1NH
L0402
C66 10pF/50V
C0402
L5
12nH
+/-5%
L0402
L4
2.2nH
+/-0.1NH
L0402
C64
1.2pF/50V
C0402
C70 0.75pF/50V
C0402
Un
Re
gis
te
re
d
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SYS
WIRELESS_LED1
Power_LED
Trade-offs:
Nets name LED0, LED1, LED2, LED3, LED4, LED6 are also for
Boot-strap during power on.
To avoid wrong voltage applyed on the IO pin from LED,
these GPIOs should be source current only.
The rest LEDs are using sink current mode to reduce
the Hornet internal 2.5V LDO loading (thermal).
LEDs are 0603 SMT type
becaused of plastic optical guide.
Ethernet on/off
on=High
25MHz XTAL
=Low
PORT4_LED
USB Host Mode
=High
10/100 LAN port
All WAN and LAN ports support Auto-MDIX.
10/100 WAN port
Boot from SPI Flash
=High
Chip Mode[0]
=Low
Chip Mode[1]
=Low
FW download
=Low
LED0 LED1
LED2 LED3 LED4 LED5
LED6
LED7
P3_RX-
P3_RX+
P3_TX-
P3_TX+
P4_RX+
P4_RX-
P4_TX+
P4_TX-
LED0
LED7
LED0
P2_TX+
P2_TX-
P2_RX+
P2_RX-
LED5
TX3+
TX3-
TX4-
RX4-
TX4+
RX4+
RX3+
RX3-
P4_TX-
P4_TX+
P4_RX+
P4_RX-
P3_TX+
P3_RX-
P3_TX-
P3_RX+
P4_CT1
P4_CT2
P3_CT1
P3_CT2
TX4+P4_TX+
RX4-
P4_CT1
P4_CT2
RX4+
TX4-
P4_RX+
P4_RX-
P4_TX-
RX3-
TX3+P3_TX+
P3_CT1
P3_CT2
P3_TX-
RX3+
TX3-
P3_RX+
P3_RX-
P2_TX-
P2_TX+
P2_RX-
P2_RX+
LED5
P2_CT1
RX2-
P2_TX+ TX2+
P2_CT3
P2_CT4P2_CT2
RX2+
P2_TX-
P2_RX-
P2_RX+
TX2-
RX2+
TX2+
TX2-
RX2-
P2_CT1
P2_CT2
P2_CT3
P2_CT4
TX2-
TX2+
RX2-
RX2+
VDD33
VDD25
VDD25 VDD25
GND_ENET
GND_ENET
AVDD2V02.0V
GND_ENET
AVDD2V0
AVDD2V0
AVDD2V0
AVDD2V0
GND_ENET
GND_ENET
GND_ENET
GND_ENET GND
VDD25
VDD25 VDD25 VDD25
AVDD2V0
AVDD2V0
EMAC_3V3
EMAC_3V3
LED73
LED03
P4_TX-3
P4_RX+3
P4_TX+3
P4_RX-3