Quantum-dot_devices_and_quantum-dot_cellular_automata

International Journal of Bifurcation and Chaos, Vol. 7, No. 10 (1997) 2199{2218 Visions of Nonlinear Science: Festschrift dedicated to Leon O. Chua c© World Scienti�c Publishing Company QUANTUM-DOT DEVICES AND QUANTUM-DOT CELLULAR AUTOMATA WOLFGANG POROD Department of Electrical Engineering, University of Notre Dame, Notre Dame, IN 46556, USA Received June 26, 1996; Revised February 16, 1997 We discuss novel nanoelectronic architecture paradigms based on cells composed of coupled quantum-dots. Boolean logic functions may be implemented in speci�c arrays of cells repre- senting binary information, the so-called Quantum-Dot Cellular Automata (QCA). Cells may also be viewed as carrying analog information and we outline a network-theoretic description of such Quantum-Dot Nonlinear Networks (Q-CNN). In addition, we discuss possible realizations of these structures in a variety of semiconductor systems (including GaAs/AlGaAs, Si/SiGe, and Si/ SiO2), rings of metallic tunnel junctions, and candidates for molecular implementations. 1. Introduction Since its inception a few decades ago, silicon ULSI technology has experienced an exponential improve- ment in virtually any �gure of merit. However, there are indications now that this progress will slow, or even come to a standstill, as technologi- cal and fundamental limits are being reached. This slow-down of conventional silicon technology may provide an opportunity for alternative device tech- nologies. In this paper, we will describe some ideas of the Notre Dame NanoDevices Group on a pos- sible future nanoelectronic computing technology based on cells of coupled quantum dots. Up until today, silicon technology has closely followed a famous dictum made in 1965 by Intel Corporation chairman Gordon Moore. In those early days of the integrated circuit, he had pro- jected the expected progress for the next decade, anticipating that the number of transistors on a chip and their performance would double every 18 months, or so. Now, three decades later, this pre- diction has turned out to be remarkably accurate over the whole duration. Figure 1 gives a schematic version of this so-called Moore’s Law, the solid line showing the exponential reduction in the minimum feature size over the past 30 years. For how long will this trend continue? In recent years, the Semiconductor Industry Association has studied this question and issued a blueprint for future development which has become known as the SIA Roadmap [1994]. Basically, the Roadmap predicts a continuation of Moore’s Law early into the next century. However, there is an increasing indication that these improvements will not continue when we enter the deep submicron or nanometric regime. Both technological and funda- mental limitations will be responsible for the an- ticipated slow-down and eventual standstill. It is expected that by the year 2010, minimum feature sizes will be on the order of 0.07 micrometer, or 70 nanometer (103 nm = 1 �m = 10−6 m). Among the chief technological limitations re- sponsible for this expected slow-down are the in- terconnect problem and power dissipation [Keyes, 1987; Ferry et al., 1987, 1988]. As more and more devices are packed into the same area, the heat gen- erated during a switching cycle can no longer be removed, and the chip literally begins to melt. In- terconnections do not scale in concert with device scaling because of the e�ect of wire resistance and capacitance, giving rise to a wiring bottleneck. It is 2199 2200 W. Porod Fig. 1. Schematic version of Moore’s Law showing the exponential reduction in the minimum feature size for the past three decades (solid line) and its extrapolation into the next century (dashed line). generally recognized that alternate approaches are needed to create innovative technologies that pro- vide greater device and interconnect functionality per lithography feature, thus lessening the depen- dence on simple scaling, or to utilize innovative cir- cuit and system architectural features that provide more function per transistor. Fundamental limits arise as device dimensions shrink due to changes in device performance dic- tated by the laws of physics. These phenomena in- clude a loss of gate control and quantum mechanical e�ects as devices enter the nanometer regime. Cur- rent CMOS technology is based on devices which basically act as voltage-controlled current switches. In the deep submicron regime, the required gate control will no longer be possible because of short- channel e�ects due to electrostatics. Device opera- tion will also be altered due to the emerging quan- tum mechanical nature of the electrons, thus giving rise to novel physical e�ects. Because of the above reasons, expectations are that potential show-stoppers await conventional sil- icon ULSI as it approaches the nanometer regime. Scaled-down transistors interconnected in conven- tional circuit architectures will no longer function as required and the fabrication will pose insurmount- able problems. However, these obstacles for silicon circuitry may present an opportunity for alterna- tive device technologies which are designed for the nano-regime and which are interconnected in an ap- propriate architecture. This is the main \vision" of this paper. In this paper, we describe our ideas of us- ing nanostructures (more speci�cally, quantum dots) which are arranged in locally-interconnected cellular-automata-like arrays. We will demonstrate that suitably constructed structures may be used for computation and signal processing. Our pro- posal is called \Quantum-Dot Cellular Automata" (QCA) [Lent et al., 1993]. Note that our proposal is not a quantum computer in the sense of the \quan- tum computing" community, as reviewed by Spiller [1996]. QCA’s do not require quantum mechan- ical phase coherence over the entire array; phase coherence is only required inside each cell and the cell{cell interactions are classical. This limited re- quirement of quantum mechanical phase coherence makes QCA’s a more attractive candidate for actual implementations. Our work is based on the highly advanced state-of-the-art in the �eld of nanostructures and the emerging technology of quantum-dot fabri- cation [Weisbuch & Vinter, 1991; Kelly, 1995; Turton, 1995; Montemerlo et al., 1996]. As Fig. 2. Schematic diagram of arti�cial \quantum-dot atoms" and \quantum-dot molecules" which are occupied by few electrons. Quantum-Dot Devices and Quantum-Dot Cellular Automata 2201 schematically shown in Fig. 2, several groups have demonstrated that electrons may be com- pletely con�ned in semi-conductor nanostructures, which may then be thought of as arti�cial \semi- conductor atoms". Controllable occupation of these quantum dots has been achieved in the few- electron regime. One may speak of \quantum-dot hydrogen", \quantum-dot helium", \quantum-dot lithium", etc. [Kastner, 1993; Ashoori, 1996]. Very recently, coupling between quantum-dot atoms in close proximity has been observed, thus realizing arti�cial \quantum-dot molecules". In order to observe quantization phenomena, extremely pure material is needed and the experi- ments have to be done at very low temperatures us- ing cryogenic techniques [Weisbuch & Vinter, 1991]. The reason for this is that quantum-mechanical co- herence is destroyed by scattering due to both im- purities (thus the requirement of highly pure ma- terial) and lattice vibrations (thus the requirement of low temperature). While low temperatures are not desirable for purposes of applications, they re- flect the current technological limitation in the fab- rication of nano-meter-size structures [Kelly, 1995]. Any decrease in the feature sizes will result in less stringent requirements for purity and low tempera- ture. Control on the molecular level, i.e. molecular electronics implementations, would make possible room temperature operation. We are led to consider quantum dots for device applications. This will entail a need for new circuit architecture ideas for these new devices. The nano- structures we envision will contain only few elec- trons available for conduction. It is hard to imagine how devices based on nanostructures could func- tion in conventional circuits, primarily due to the problems associated with charging the interconnect wiring with the few electrons available. Therefore, we propose to envision a nanoelectronic architecture where the information is contained in the arrange- ment of charges and not in the flow of charges (i.e. current). In other words, the devices interact by di- rect Coulomb coupling and not by currents through wires. We envision to utilize the existing physical interactions between neighboring devices in order to directly produce the dynamics, such that the logical operation of each cell would require no additional connections beyond the physical coupling within a certain range of interactions. We are led to consider cellular-automata-like device architectures of cells communicating with each other by their Coulombic interaction. Figure 3 schematically shows a locally- interconnected array consisting of cells of nano- electronic devices. The physical interactions to- gether with the array topology determine the overall functionality. \What form must a cellular array take when its dynamics should result directly from known physical interactions?". If we simply arrange nanometer-scale devices in a dense cellular array, the device cells may interact, but we have given up all control over which cell interacts with which neighbor and when they interact. In general, the state of a cell will depend on the state of its neighbors within a certain range. The main ques- tions now are: \What functionality does one obtain for a given physical structure?" and \Given a cer- tain array behavior, is there a physical system to implement it?". This problem of a desired mapping between lo- cal connection rules and overall array behavior is an old one, and known to be di�cult. No general principles exist which would allow one to extrapo- late \interesting" array dynamics from a given set of interactions. A two-pronged approach suggests itself to tackle this problem: In the \top down ap- proach" the functionality of the array is �rst speci- �ed, and then one faces the problem of realizing the required local connectivities. On the other hand, in a \bottom up approach" the physical pattern of in- terconnections is given, and one then attempts to infer possible overall behavior of the array. Computation in physics-like cellular spaces has been studied over the years. Konrad Zuse, a Ger- man computer pioneer, investigated the behavior of discrete-space and discrete-time systems, which he termed \Rechnender Raum" (translated as \Com- puting Space") [Zuse, 1969]. He showed that a binary space (two states per cell) with an appro- priate dynamical law support the propagation of Fig. 3. Schematic picture of a cellular array where the in- terconnections are given by physical law. The underlying physics determines the overall functionality of the array. 2202 W. Porod elementary patterns, which he called \Digital- Teilchen" (\Digital Particle"). The idea that \dis- crete" cellular spaces might provide an alternative to \continuous" classical physics has been discussed by To�oli and Margolus [1987]. Frisch, Hasslacher, and Pomeau [1986] showed that deterministic lat- tice gases with discrete Boolean elements are able to simulate the Navier{Stokes equation. Biafore has proposed so-called replica cellular automata for nanometer scale computation [1994]. We have stud- ied this relationship between local connectivity pat- terns with overall array behavior, using the dis- cretized Helmholtz equation as a computational model [Porod, Harbury & Lent, 1996]. Using con- tinuous cell states, one obtains wave phenomena like Huygen’s principle, di�raction, and interference. For discrete cell states, the resulting switching rules are very similar to the ones used by Konrad Zuse in his pioneering work on discrete spacetime models of computation. In the following chapters we will develop these ideas in detail and we will present a concrete ex- ample of a quantum-dot cell with an appropriate architecture, the so-called Quantum-Dot Cellular Automata. We will discuss how one may construct QCA cells that encode binary information and how one can thus realize Boolean logic functions. We will also discuss how one may view these arrays as quantum-dot cellular neural (or, nonlinear) net- works Q-CNN’s. A key question, of course, are im- plementations. We will discuss ideas (and on-going work) on attempting to implement these struc- tures in a variety of semiconductor systems (includ- ing GaAs/AlGaAs, Si/SiGe, and Si/SiO2) and also metallic dots. Alternative implementations include molecular structures. We will call attention to a speci�c molecule which appears to be particularly promising since it possesses a structure similar to a QCA cell. One of the most promising material systems appears to be Si/SiO2, mostly due to the excellent insulating properties of the oxide. Note that our search for a technology beyond silicon may bring us back to silicon! Exciting as the vision of a possible nanoelec- tronics technology may be, many fundamental and technological challenges remain to be overcome. We should keep in mind that this exploration has just begun and that other promising designs remain yet to be discovered. This exciting journey will require the combined e�orts of technologists, device physi- cists, circuit-and-systems theorists, and computer architects. 2. Introduction to Nanoelectronic Structures Here we attempt to provide a state-of-the-art survey of nanofabrication, i.e. the realization of electronic devices on the nanometer scale. In this regime, quantum mechanical e�ects become visible and may be exploited for device functionality [Capasso, 1990]. In these small structures, device performance is determined by only a few electrons, and in the limit by only a single electron per device [Grabert & Devoret, 1992]. Our focus in particular will be on a review of quantum-dot fabrication techniques for the design and realization of arti�cial semicon- ductor quantum-dot atoms and molecules [Kastner, 1993; Ashoori, 1996]. 2.1. Low-dimensional semiconductor structures Advanced semiconductor growth techniques, such as molecular beam epitaxy (MBE), allow the fab- rication of semiconductor sandwich structures with interfaces of virtually atomic precision. This con- trol in the growth direction allows one to realize ar- ti�cial layered crystals with desired electronic and optical properties, as �rst suggested by Esaki and Tsu [1970]. A schematic picture of such a sandwich structure is shown in Fig. 4. The various layers can be made to posses di�erent properties by choos- ing an appropriate material during growth. One of the main uses of this technique is to utilize the di�erence in bandgap between materials in the var- ious layers. This di�erence in the band gap results in an e�ective electronic potential energy which Fig. 4. Schematic diagram of a semiconductor sandwich structure with a \quantum well" layer resulting in a quasi two-dimensional electronic system. Quantum-Dot Devices and Quantum-Dot Cellular Automata 2203 Fig. 5. Schematic diagram of etched lines resulting in \quantum wires" and etched pillars resulting in \quantum dots". electrons experience, as schematically shown in the �gure. This technique is referred to as bandgap en- gineering and has been used extensively to taylor device structures [Capasso, 1990]. The layers can be grown su�ciently thin such that the quantum mechanical con�nement e�ect becomes important. Also shown in the �gure below are the resulting quantized energy states in the quantum well struc- ture. This leads to the formation of a quasi two- dimensional electronic system in the quantum well layer (2DEG). Control in the lateral direction can be achieved by conventional patterning techniques such as optical or electron-beam lithography. Subsequent processing steps, e.g. etching, can then selectively remove material to de�ne lines or dot patterns, as schematically shown in Fig. 5. This process- ing results in further con�nement of the 2DEG into quasi one-dimensional systems (so-called quantum wires) or even quasi zero-dimensional systems (so- called quantum dots) [Reed et al., 1988; Meurer et al., 1992]. A di�erent approach of further constricting a 2DEG is to use electrostatic con�nement. As schematically shown in Fig. 6, one may use lat- eral patterning techniques to shape a metallic layer which has been deposited onto the top surface of the MBE-grown semiconductor sandwich struc- ture. Applying a negative bias to the gates will deplete the 2DEG underneath the metallic elec- trodes. In this fashion, one may create quantum wires by using two gates as schematically shown. In the literature, this technique is referred to as split-gate design [Thornton et al., 1986]. Using a Fig. 6. Schematic diagram of further shaping a 2DEG into \quantum wires" and \quantum dots" by using electrostatic con�nement provided by patterned metallic electrodes. variety of gate structures, one may realize elec- tronic systems of arbitrary shape. In particular, one may use gates to create \puddles" of electrons, thus realizing quantum dots [Meirav et al., 1990]. In recent years, there have been a variety of exper- iments on such gate-con�ned quantum dots, and it has been demonstrated that the dot size, and thus also its occupation, can be adjusted by appropri- ately varying the bias voltages on the top gates [Ho�mann et al., 1995; Waugh et al., 1995; Blick et al., 1996]. The techniques described so far utilize process- ing steps which are also used in conventional IC fabrication. In addition, more exotic nanostructure fabrication techniques are under study and develop- ment, which include the use of scanning tunneling microscope (STM) tips and chemical self-assembly. Nanolithography using an atomic force micro- scope (AFM) is also possible. The atomically-sharp AFM tip may be used to either directly pattern the surface by scratching [Wendel et al., 1996], or it may be used to induce local chemical or physical reaction thus modifying the surface [Lyding et al., 1994]. AFM nanometer scale lithography has been described on various materials and structures, in- cluding processing at ambient conditions. The gen- erated patterns can then be transferred to the two- dimensional electron gas by wet chemical etching or ion-beam irradiation. Chemical self-assembly techniques may also be used to create nanostructure. Using special growth conditions, several groups have demon- strated that very thin semiconductor layers sponta- neously assemble into tiny droplets, which exhibit quantum-con�nement e�ects [Leonard et al., 1993; Kirstaedter et al., 1994; Temmyo et al., 1995]. Elas- tic strain appears to play a critical role. While this 2204 W. Porod technique yields rather small dots (with sizes on the order of 10 nm, or so), the exact placement of these dots is still a problem, but progress is being made. 3. Quantum-Dot Cellular Automata Based upon the emerging technology of quantum- dot fabrication, the Notre Dame NanoDevices group has proposed a scheme for computing with cells of coupled quantum dots [Lent et al., 1993], which will be described below. To our knowledge, this is the �rst concrete proposal to utilize quantum dots for computing. There had been earlier sugges- tions that device{device coupling might be utilized in a cellular-automata scheme, but alas, these were without an accompanying proposal for a speci�c im- plementation [Ferry & Porod, 1986; Grondin et al., 1987]. What we have in mind is the general architec- ture shown in Fig. 7. The coupling between the cells is given by their physical interaction, and not by wires. The physical mechanisms available for