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第10次课

2011-08-24 30页 doc 155KB 71阅读

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第10次课第8次课:2011年6月7日7、8节 第7章 F2812的ADC模块 导入: 第3节 ADC的C语言编程 1. ADC单元寄存器 TI头文件模板DSP281x_Adc.h中寄存器结构体文件定义如下: struct ADC_REGS { union ADCTRL1_REG ADCTRL1; union ADCTRL2_REG ADCTRL2; union ADCMAXCONV_REG ADCMAXCONV; union ADCCHSELSEQ1_REG ADCCHSELSEQ1; union ADCCHSELSEQ2_REG A...
第10次课
第8次课:2011年6月7日7、8节 第7章 F2812的ADC模块 导入: 第3节 ADC的C语言编程 1. ADC单元寄存器 TI头文件模板DSP281x_Adc.h中寄存器结构体文件定义如下: struct ADC_REGS { union ADCTRL1_REG ADCTRL1; union ADCTRL2_REG ADCTRL2; union ADCMAXCONV_REG ADCMAXCONV; union ADCCHSELSEQ1_REG ADCCHSELSEQ1; union ADCCHSELSEQ2_REG ADCCHSELSEQ2; union ADCCHSELSEQ3_REG ADCCHSELSEQ3; union ADCCHSELSEQ4_REG ADCCHSELSEQ4; union ADCASEQSR_REG ADCASEQSR; Uint16 ADCRESULT0; Uint16 ADCRESULT1; Uint16 ADCRESULT2; Uint16 ADCRESULT3; Uint16 ADCRESULT4; Uint16 ADCRESULT5; Uint16 ADCRESULT6; Uint16 ADCRESULT7; Uint16 ADCRESULT8; Uint16 ADCRESULT9; Uint16 ADCRESULT10; Uint16 ADCRESULT11; Uint16 ADCRESULT12; Uint16 ADCRESULT13; Uint16 ADCRESULT14; Uint16 ADCRESULT15; union ADCTRL3_REG ADCTRL3; union ADCST_REG ADCST; }; 寄存器结构体变量定义如下: extern volatile struct ADC_REGS AdcRegs; 1) ADCTRL1(ADC控制寄存器1) TI的位域定义如下: struct ADCTRL1_BITS { // bits description Uint16 rsvd1:4; // 3:0 reserved Uint16 SEQ_CASC:1; // 4 Cascaded sequencer mode Uint16 SEQ_OVRD:1; // 5 Sequencer override Uint16 CONT_RUN:1; // 6 Continuous run Uint16 CPS:1; // 7 ADC core clock pre-scalar Uint16 ACQ_PS:4; // 11:8 Acquisition window size Uint16 SUSMOD:2; // 13:12 Emulation suspend mode Uint16 RESET:1; // 14 ADC reset Uint16 rsvd2:1; // 15 reserved }; union ADCTRL1_REG { Uint16 all; struct ADCTRL1_BITS bit; }; SEQ_CASC:1 级联排序器工作方式 该位决定了SEQ1和SEQ2作为2个独立的8状态排序器还是作为1个16状态排序器SEQ工作。 0 双排序器模式 1 级联模式 CONT_RUN:1 0 启/停运行模式 1 连续运行模式 CPS:1 ADC模块的工作时钟ADCCLK来自高速外设时钟HSPCLK。ADCTRL3寄存器的CLKPS位域对外设时钟HSPCLK进行分频。ADCTRL1寄存器的CPS位域另外提供一个2分频。 除此之外,ADCTRL1寄存器的ACQ_PS位域用来扩展触发脉冲的宽度,每个采样通道的采样窗时间由触发脉冲宽度决定。 内核时钟预定标 0 CLK/1 1 CLK/2 CLK是定标后的HSPCLK。 ACQ_PS:4 采样时间选择位域 控制SOC的脉冲宽度,同时也决定了采样开关闭合的时间。采样保持时间为: ACQ_PS+1个ADCLK周期数 SUSMOD:2 仿真悬挂模式位域 RESET:1 ADC模块软件复位 2) ADCTRL2(ADC控制寄存器2) TI的位域定义如下: struct ADCTRL2_BITS { // bits description Uint16 EVB_SOC_SEQ2:1; // 0 Event manager B SOC mask for SEQ2 Uint16 rsvd1:1; // 1 reserved Uint16 INT_MOD_SEQ2:1; // 2 SEQ2 Interrupt mode Uint16 INT_ENA_SEQ2:1; // 3 SEQ2 Interrupt enable Uint16 rsvd2:1; // 4 reserved Uint16 SOC_SEQ2:1; // 5 Start of conversion for SEQ2 Uint16 RST_SEQ2:1; // 6 Reset SEQ2 Uint16 EXT_SOC_SEQ1:1; // 7 External start of conversion for SEQ1 Uint16 EVA_SOC_SEQ1:1; // 8 Event manager A SOC mask for SEQ1 Uint16 rsvd3:1; // 9 reserved Uint16 INT_MOD_SEQ1:1; // 10 SEQ1 Interrupt mode Uint16 INT_ENA_SEQ1:1; // 11 SEQ1 Interrupt enable Uint16 rsvd4:1; // 12 reserved Uint16 SOC_SEQ1:1; // 13 Start of conversion trigger for SEQ1 Uint16 RST_SEQ1:1; // 14 Restart sequencer 1 Uint16 EVB_SOC_SEQ:1; // 15 EVB SOC enable }; union ADCTRL2_REG { Uint16 all; struct ADCTRL2_BITS bit; }; EVB_SOC_SEQ2:1 SEQ2的事件管理器B的触发源屏蔽位 0 EVB的触发信号不能启动SEQ2 1 允许EVB触发SEQ2,可对事件管理器编程,采用各种事件触发转换 INT_MOD_SEQ2:1 SEQ2中断模式选择位 0 每个SEQ2序列结束时,INT SEQ2置位 1 每隔一个SEQ2序列结束时,INT SEQ2置位 INT_ENA_SEQ1:1 SEQ2中断使能位 0 禁止INT SEQ2产生中断申请 1 使能INT SEQ2产生中断申请 SOC_SEQ2:1 双排序器模式下,SEQ2的转换触发启动位,软件触发向该位域写1 RST_SEQ2:1 复位SEQ2 写1,立即复位SEQ2到初始的预触发状态 EXT_SOC_SEQ1:1 写1,外部ADCSOC引脚信息启动ADC自动转换序列 3) ADCTRL3(ADC控制寄存器3) TI的位域定义如下: struct ADCTRL3_BITS { // bits description Uint16 SMODE_SEL:1; // 0 Sampling mode select Uint16 ADCCLKPS:4; // 4:1 ADC core clock divider Uint16 ADCPWDN:1; // 5 ADC powerdown Uint16 ADCBGRFDN:2; // 7:6 ADC bandgap/ref power down Uint16 ADCEXTREF:1; // 8 ADC external reference Uint16 rsvd1:7; // 15:9 reserved }; union ADCTRL3_REG { Uint16 all; struct ADCTRL3_BITS bit; }; SMODE_SEL:1 采用模式选择 0 顺序采样 1 同步采样 ADCCLKPS ADC的内核时钟分频器 0000 0 0001 1 …… 1111 15 ADCPWDN ADC电源控制位,该位控制带隙和参考电路外的ADC其他模拟电路的供电 0 除带隙和参考电路外的ADC其他模拟电路掉电 1 除带隙和参考电路外的ADC其他模拟电路上电 ADCBGRFDN:2 ADC带隙和参考电路的电源控制 00 掉电 11 上电 ADCEXTREF:1 0 使能内部参考电源 1 使能外部参考电源 ADC的参考电压有2种提供方式:内部参考电压和外部参考电压。具体选择哪种参考电压由ADCTRL3的ADCEXTREF位域来控制,这种设计主要是为模数转换的增益校准提供方便。为了获得良好的增益性能,处理器要求2个参考引脚ADCREFP和ADCREFM的电压差为1V。 ADC模块支持3种低功耗的电源控制方式:ADC模块加电、ADC模块掉电、ADC模块关闭,通过ADCTRL3寄存器的2个位域来控制:ADCBGRFDN、ADCPWDN。 两个电源控制方式位实际上是2个独立电源的控制开关:ADCBGREDN为ADC模块内部参考电路和带隙基准的开关,ADCPWDN为ADC模块其他部分电路的开关。当上电复位时,ADC模块处于关闭状态,以降低系统的功耗。为了使用ADC模块,需要给ADC模块上电,要遵循以下步骤: (1) 在给ADC模块的其他部分电路上电之前,必须先给参考电路和带隙基准加电; (2) 给参考电路和带隙基准加电后,延迟5毫秒,再给ADC模块的其他部分上电; (3) 当ADC模块完全加电后,需要等待额外的20微妙,ADC模块才能进行第一次转换。 当ADC模块掉电时,必须同时将三个电源控制方式全部清零。ADC模块的电源控制必须通过软件来实现,它们独立于芯片的电源之外。 以上内容主要与ADC模块的初始化有关。 4) ADCMAXCONV(最大转换通道寄存器) TI的位域定义如下: struct ADCMAXCONV_BITS { // bits description Uint16 MAX_CONV1:4; // 3:0 Max number of conversions Uint16 MAX_CONV2:3; // 6:4 Max number of conversions Uint16 rsvd1:9; // 15:7 reserved }; union ADCMAXCONV_REG { Uint16 all; struct ADCMAXCONV_BITS bit; }; MAX_CONV1:4 用于级联SEQ和双排序器的SEQ1 SEQ模式下: 0000 0 0001 1 …… 1111 15 SEQ1模式下: x000 0 x001 1 …… x111 7 MAX_CONV2:3 用于双排序器模式下的SEQ2: 000 0 001 1 …… 111 7 5) ADCCHSELSEQ1(排序控制寄存器1) TI的位域定义如下: struct ADCCHSELSEQ1_BITS { // bits description Uint16 CONV00:4; // 3:0 Conversion selection 00 Uint16 CONV01:4; // 7:4 Conversion selection 01 Uint16 CONV02:4; // 11:8 Conversion selection 02 Uint16 CONV03:4; // 15:12 Conversion selection 03 }; union ADCCHSELSEQ1_REG{ Uint16 all; struct ADCCHSELSEQ1_BITS bit; }; 6) ADCCHSELSEQ2(排序控制寄存器2) TI的位域定义如下: struct ADCCHSELSEQ2_BITS { // bits description Uint16 CONV04:4; // 3:0 Conversion selection 04 Uint16 CONV05:4; // 7:4 Conversion selection 05 Uint16 CONV06:4; // 11:8 Conversion selection 06 Uint16 CONV07:4; // 15:12 Conversion selection 07 }; union ADCCHSELSEQ2_REG{ Uint16 all; struct ADCCHSELSEQ2_BITS bit; }; 7) ADCCHSELSEQ3(排序控制寄存器3) TI的位域定义如下: struct ADCCHSELSEQ3_BITS { // bits description Uint16 CONV08:4; // 3:0 Conversion selection 08 Uint16 CONV09:4; // 7:4 Conversion selection 09 Uint16 CONV10:4; // 11:8 Conversion selection 10 Uint16 CONV11:4; // 15:12 Conversion selection 11 }; union ADCCHSELSEQ3_REG{ Uint16 all; struct ADCCHSELSEQ3_BITS bit; }; 8) ADCCHSELSEQ4(排序控制寄存器4) TI的位域定义如下: struct ADCCHSELSEQ4_BITS { // bits description Uint16 CONV12:4; // 3:0 Conversion selection 12 Uint16 CONV13:4; // 7:4 Conversion selection 13 Uint16 CONV14:4; // 11:8 Conversion selection 14 Uint16 CONV15:4; // 15:12 Conversion selection 15 }; union ADCCHSELSEQ4_REG { Uint16 all; struct ADCCHSELSEQ4_BITS bit; }; 9) ADCCASEQSR(自动排序状态寄存器) TI的位域定义如下: struct ADCASEQSR_BITS { // bits description Uint16 SEQ1_STATE:4; // 3:0 SEQ1 state Uint16 SEQ2_STATE:3; // 6:4 SEQ2 state Uint16 rsvd1:1; // 7 reserved Uint16 SEQ_CNTR:4; // 11:8 Sequencing counter status Uint16 rsvd2:4; // 15:12 reserved }; union ADCASEQSR_REG { Uint16 all; struct ADCASEQSR_BITS bit; }; SEQ1_STATE:4 SEQ1的状态指针,总是指向SEQ1中当前正在被转换的通道 SEQ2_STATE:3 SEQ2的状态指针,总是指向SEQ2中当前正在被转换的通道 SEQ_CNTR:4 排序器通道序列计数器,当SEQ_CNTR减为0时,当前排序器的通道转换完成。 10) ADCST(状态和标志寄存器) TI的位域定义如下: struct ADCST_BITS { // bits description Uint16 INT_SEQ1:1; // 0 SEQ1 Interrupt flag Uint16 INT_SEQ2:1; // 1 SEQ2 Interrupt flag Uint16 SEQ1_BSY:1; // 2 SEQ1 busy status Uint16 SEQ2_BSY:1; // 3 SEQ2 busy status Uint16 INT_SEQ1_CLR:1; // 4 SEQ1 Interrupt clear Uint16 INT_SEQ2_CLR:1; // 5 SEQ2 Interrupt clear Uint16 EOS_BUF1:1; // 6 End of sequence buffer1 Uint16 EOS_BUF2:1; // 7 End of sequence buffer2 Uint16 rsvd1:8; // 15:8 reserved }; union ADCST_REG { Uint16 all; struct ADCST_BITS bit; }; INT_SEQ1:1 SEQ1的中断标志位 0 SEQ1无中断事件 1 SEQ1已产生中断事件 INT_SEQ2:1 SEQ2的中断标志位 0 SEQ2无中断事件 1 SEQ2已产生中断事件 SEQ1_BSY:1 SEQ1的忙状态位 0 SEQ1处于空闲状态,等待触发 1 SEQ1正在运行 SEQ2_BSY:1 SEQ2的忙状态位 0 SEQ2处于空闲状态,等待触发 1 SEQ2正在运行 INT_SEQ1_CLR:1 中断清除位 0 写0无影响 1 写1清除SEQ1的中断标志位INT_SEQ1 INT_SEQ2_CLR:1 中断清除位 0 写0无影响 1 写1清除SEQ2的中断标志位INT_SEQ2 EOS_BUF1:1 SEQ1的序列转换结束缓冲位,用于中断模式1的操作 EOS_BUF2:1 SEQ2的序列转换结束缓冲位,用于中断模式2的操作 11) ADCRESULT0 ~ADCRESULT15(结果寄存器) 2. ADC的C程序设计 TI源文件模板DSP281x_Adc.c给出了ADC的初始化源程序: #include "DSP281x_Device.h" // DSP281x Headerfile Include File #include "DSP281x_Examples.h" // DSP281x Examples Include File #define ADC_usDELAY 8000L #define ADC_usDELAY2 20L void InitAdc(void) { extern void DSP28x_usDelay(Uint32 Count); // To powerup the ADC the ADCENCLK bit should be set first to enable // clocks, followed by powering up the bandgap and reference circuitry. // After a 5ms delay the rest of the ADC can be powered up. After ADC // powerup, another 20us delay is required before performing the first // ADC conversion. Please note that for the delay function below to // operate correctly the CPU_CLOCK_SPEED define statement in the // DSP28_Examples.h file must contain the correct CPU clock period in // nanoseconds. For example: AdcRegs.ADCTRL1.bit.RESET=1; AdcRegs.ADCTRL3.bit.ADCBGRFDN = 0x3; // Power up bandgap/reference circuitry DELAY_US(ADC_usDELAY); // Delay before powering up rest of ADC AdcRegs.ADCTRL3.bit.ADCPWDN = 1; // Power up rest of ADC DELAY_US(ADC_usDELAY2); // Delay after powering up ADC } 1) 配置ADC的初始化上电 首先,复位ADC,之后要给带隙基准和参考电路上电; 在给带隙基准和参考电路加电后,延迟5ms,再给ADC模块其他部分电路加电; ADC模块完全加电完成后,需要再等待20μs,才能进行第一次转换。 TI的初始化源程序InitAdc( )给出的就是这样的上电过程。 DSP28x_usDelay(Uint32 Count)是写在DSP281x_Examples.h中定义的延时程序。 #define DELAY_US(A) DSP28x_usDelay(((((long double) A * 1000.0L) / (long double)CPU_RATE) - 9.0L) / 5.0L) //#define CPU_RATE 6.667L // for a 150MHz CPU clock speed (SYSCLKOUT) //#define CPU_RATE 7.143L // for a 140MHz CPU clock speed (SYSCLKOUT) //#define CPU_RATE 8.333L // for a 120MHz CPU clock speed (SYSCLKOUT) //#define CPU_RATE 10.000L // for a 100MHz CPU clock speed (SYSCLKOUT) //#define CPU_RATE 13.330L // for a 75MHz CPU clock speed (SYSCLKOUT) //#define CPU_RATE 20.000L // for a 50MHz CPU clock speed (SYSCLKOUT) //#define CPU_RATE 33.333L // for a 30MHz CPU clock speed (SYSCLKOUT) //#define CPU_RATE 41.667L // for a 24MHz CPU clock speed (SYSCLKOUT) //#define CPU_RATE 50.000L // for a 20MHz CPU clock speed (SYSCLKOUT) //#define CPU_RATE 66.667L // for a 15MHz CPU clock speed (SYSCLKOUT) //#define CPU_RATE 100.000L // for a 10MHz CPU clock speed (SYSCLKOUT) 注意:上述初始化上电过程,直接调用模板子函数即可! 2) 配置ADC的工作模式和转换操作 (1) 设置排序器工作模式:级联、双排序器 ADCTRL1的SEQ_CASC位域 (2) 设置排序器运行方式:连续、启动/停止 ADCTRL1的CONT_RUN位域 (3) 设置采样模式:顺序采样、同时采样 ADCTRL3的SMODE_SEL位域 (4) 设置最大转换通道数目:通道数(顺序采样)、通道对数(同时采样) ADCMAXCONV的MAX_CONV1和MAX_CONV2位域 (5) 设置转换顺序 ADCCHSELSEQn的CONV00~CONV15位域 (6) 设置转换的触发源 软件触发: ADCTRL2的SOC_SEQ1、SOC_SEQ2位域,可以直接置1启动转换 外部引脚触发: 只适用于级联排序器SEQ、双排序器模式的SEQ1 ADCTRL2的EXT_SOC_SEQ1设置是否可以外部引脚触发 EVA/B是否运行触发: ADCTRL2的EVA_SOC_SEQ1 ADCTRL3的EVB_SOC_SEQ2 (7) 设置中断 使能中断: ADCTRL2的INT_ENA_SEQ1 ADCTRL3的INT_ENA_SEQ2 中断模式: ADCTRL2的INT_MOD_SEQ1 ADCTRL3的INT_MOD_SEQ2 (8) 设置ADC的时钟 设置HSPCLK的0~30分频: ADCTRL3的ADCCLKPS 设置HSPCLK分频后的2分频: ADCTRL1的CPS 设置采样时间长度: 3) 例程 TI例程: // TI File $Revision: /main/3 $ // Checkin $Date: July 2, 2007 11:33:46 $ //########################################################################### // // FILE: Example_281xAdc.c // // TITLE: DSP281x ADC Example Program. // // ASSUMPTIONS: // // This program requires the DSP281x V1.00 header files. // As supplied, this project is configured for "boot to H0" operation. // // Make sure the CPU clock speed is properly defined in // DSP281x_Examples.h before compiling this example. // // Connect signals to be converted to A2 and A3. // // // DESCRIPTION: // // This example sets up the PLL in x10/2 mode, divides SYSCLKOUT // by six to reach a 25Mhz HSPCLK (assuming a 30Mhz XCLKIN). The // clock divider in the ADC is not used so that the ADC will see // the 25Mhz on the HSPCLK. Interrupts are enabled and the EVA // is setup to generate a periodic ADC SOC on SEQ1. Two channels // are converted, ADCINA3 and ADCINA2. // // Watch Variables: // // Voltage1[10] Last 10 ADCRESULT0 values // Voltage2[10] Last 10 ADCRESULT1 values // ConversionCount Current result number 0-9 // LoopCount Idle loop counter // // //########################################################################### // $TI Release: DSP281x Header Files V1.11 $ // $Release Date: September 26, 2007 $ //########################################################################### #include "DSP281x_Device.h" // DSP281x Headerfile Include File #include "DSP281x_Examples.h" // DSP281x Examples Include File // Prototype statements for functions found within this file. interrupt void adc_isr(void); // Global variables used in this example: Uint16 LoopCount; Uint16 ConversionCount; Uint16 Voltage1[10]; Uint16 Voltage2[10]; main() { // Step 1. Initialize System Control: // PLL, WatchDog, enable Peripheral Clocks // This example function is found in the DSP281x_SysCtrl.c file. InitSysCtrl(); // For this example, set HSPCLK to SYSCLKOUT / 6 (25Mhz assuming 150Mhz SYSCLKOUT) EALLOW; SysCtrlRegs.HISPCP.all = 0x3; // HSPCLK = SYSCLKOUT/6 EDIS; // Step 2. Initialize GPIO: // This example function is found in the DSP281x_Gpio.c file and // illustrates how to set the GPIO to it's default state. // InitGpio(); // Skipped for this example // Step 3. Clear all interrupts and initialize PIE vector table: // Disable CPU interrupts DINT; // Initialize the PIE control registers to their default state. // The default state is all PIE interrupts disabled and flags // are cleared. // This function is found in the DSP281x_PieCtrl.c file. InitPieCtrl(); // Disable CPU interrupts and clear all CPU interrupt flags: IER = 0x0000; IFR = 0x0000; // Initialize the PIE vector table with pointers to the shell Interrupt // Service Routines (ISR). // This will populate the entire table, even if the interrupt // is not used in this example. This is useful for debug purposes. // The shell ISR routines are found in DSP281x_DefaultIsr.c. // This function is found in DSP281x_PieVect.c. InitPieVectTable(); // Interrupts that are used in this example are re-mapped to // ISR functions found within this file. EALLOW; // This is needed to write to EALLOW protected register PieVectTable.ADCINT = &adc_isr; EDIS; // This is needed to disable write to EALLOW protected registers // Step 4. Initialize all the Device Peripherals: // This function is found in DSP281x_InitPeripherals.c // InitPeripherals(); // Not required for this example InitAdc(); // For this example, init the ADC // Step 5. User specific code, enable interrupts: // Enable ADCINT in PIE PieCtrlRegs.PIEIER1.bit.INTx6 = 1; IER |= M_INT1; // Enable CPU Interrupt 1 EINT; // Enable Global interrupt INTM ERTM; // Enable Global realtime interrupt DBGM LoopCount = 0; ConversionCount = 0; // Configure ADC AdcRegs.ADCTRL1.bit.SEQ_CASC = 1; AdcRegs.ADCTRL1.bit.SMODE_SEL = 0; AdcRegs.ADCMAXCONV.all = 0x0001; // Setup 2 conv's on SEQ1 AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x3; // Setup ADCINA3 as 1st SEQ1 conv. AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x2; // Setup ADCINA2 as 2nd SEQ1 conv. AdcRegs.ADCTRL2.bit.EVA_SOC_SEQ1 = 1; // Enable EVASOC to start SEQ1 AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1; // Enable SEQ1 interrupt (every EOS) AdcRegs.ADCTRL3.bit.ADCCLKPS = 0x0; AdcRegs.ADCTRL1.bit.CPS = 0; // Configure EVA // Assumes EVA Clock is already enabled in InitSysCtrl(); EvaRegs.T1CMPR = 0x0080; // Setup T1 compare value EvaRegs.T1PR = 0xFFFF; // Setup period register EvaRegs.GPTCONA.bit.T1TOADC = 1; // Enable EVASOC in EVA EvaRegs.T1CON.all = 0x1042; // Enable timer 1 compare (upcount mode) // Wait for ADC interrupt while(1) { LoopCount++; } } interrupt void adc_isr(void) { Voltage1[ConversionCount] = AdcRegs.ADCRESULT0 >>4; //12位结果右移4位存储 Voltage2[ConversionCount] = AdcRegs.ADCRESULT1 >>4; // If 40 conversions have been logged, start over if(ConversionCount == 9) { ConversionCount = 0; } else ConversionCount++; // Reinitialize for next ADC sequence AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1; // Reset SEQ1 AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1; // Clear INT SEQ1 bit PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; // Acknowledge interrupt to PIE return; } 试验箱程序: /* ;************************************************************** ;* 北京达盛科技有限公司 ;* 研 发 部 ;* ;* http://www.techshine.com ;*************************************************************/ /*----------------------- 文件信息 ---------------------------- ;* ;* 文件名称 : Example_DSP281x_AdcSoc.c ;* 适用平台 : DSP E100 实验箱; ;* CPU类型 : DSP TMS320F2812 ;* 软件环境 : CCS3.1 ;* 试验接线 : 1、F2812CPU板的JUMP1的1和2脚短接,拨码开关SW1的第二位置ON; ;* 2、底板的开关SW1的第1和第6位置ON,其余置OFF。 ;* 3、将二号孔SIN用导线连接到AIN0和AIN1。 ;* 试验现象 : 设置好CCS的环境,打开本工程,编译、下载、运行。 ;* 利用图形观察窗口观察采进的波形。 ;* 地址译码说明:基地址:0x2000,当底板片选CS1为低时,分配有效。 */ /*************************头文件*********************************/ #include "DSP281x_Device.h" // DSP281x Headerfile Include File #include "DSP281x_Examples.h" // DSP281x Examples Include File // Prototype statements for functions found within this file. interrupt void adc_isr(void); // Global variables used in this example: Uint16 LoopCount; Uint16 ConversionCount; Uint16 input1[256]; Uint16 input2[256]; Uint16 Mixing[256]; void main(void) { // PLL, WatchDog, enable Peripheral Clocks // This example function is found in the DSP281x_SysCtrl.c file. InitSysCtrl(); // For this example, set HSPCLK to SYSCLKOUT / 6 (25Mhz assuming 150Mhz SYSCLKOUT) EALLOW; SysCtrlRegs.PLLCR.all=0x8; SysCtrlRegs.HISPCP.all = 0x3; // HSPCLK = SYSCLKOUT/6 EDIS; // Disable CPU interrupts DINT; // Initialize the PIE control registers to their default state. InitPieCtrl(); // Disable CPU interrupts and clear all CPU interrupt flags: IER = 0x0000; IFR = 0x0000; // Initialize the PIE vector table with pointers to the shell Interrupt // Service Routines (ISR). InitPieVectTable(); // Interrupts that are used in this example are re-mapped to // ISR functions found within this file. EALLOW; // This is needed to write to EALLOW protected register PieVectTable.ADCINT = &adc_isr; EDIS; // This is needed to disable write to EALLOW protected registers InitAdc(); // For this example, init the ADC // Enable ADCINT in PIE PieCtrlRegs.PIEIER1.bit.INTx6 = 1; IER |= M_INT1; // Enable CPU Interrupt 1 EINT; // Enable Global interrupt INTM ERTM; // Enable Global realtime interrupt DBGM LoopCount = 0; ConversionCount = 0; // Configure ADC AdcRegs.ADCTRL1.bit.SEQ_CASC = 1; AdcRegs.ADCMAXCONV.all = 0x0001; // Setup 2 conv's on SEQ1 AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x0; // Setup ADCINA0 as 1st SEQ1 conv. AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x2; // Setup ADCINA2 as 2nd SEQ1 conv. AdcRegs.ADCTRL2.bit.EVA_SOC_SEQ1 = 1; // Enable EVASOC to start SEQ1 AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1; // Enable SEQ1 interrupt (every EOS) // Configure EVA // Assumes EVA Clock is already enabled in InitSysCtrl(); EvaRegs.T1CMPR = 0x0380; // Setup T1 compare value EvaRegs.T1PR = 0x07FF; // Setup period register EvaRegs.GPTCONA.bit.T1TOADC = 1; // Enable EVASOC in EVA EvaRegs.T1CON.all = 0x1042; // Enable timer 1 compare (upcount mode) // Wait for ADC interrupt for(;;) { LoopCount++; } } interrupt void adc_isr(void) { input1[ConversionCount] = AdcRegs.ADCRESULT0 >>4; input2[ConversionCount] = AdcRegs.ADCRESULT1 >>4; Mixing[ConversionCount] = input1[ConversionCount] + input2[ConversionCount]; if(ConversionCount == 256) { ConversionCount = 0;//加软件断点 } else ConversionCount++; // Reinitialize for next ADC sequence AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1; // Reset SEQ1 AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1; // Clear INT SEQ1 bit PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; // Acknowledge interrupt to PIE return; }
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