IPC-EIA-J-STD-002A(元件引线、端子、焊片、接线柱及导线可焊性试验)CN

JOINT INDUSTRY STANDARD Solderability Tests for Component Leads, Terminations, Lugs, Terminals and Wi r e s INTERIM FINAL IPC/EIA J-STD-002A October 1998 Original Publication April 1992 Notice EIA and IPC Standards and Publications are designed to serve the public interest through eliminating misunderstandings between manufacturers and purchasers, facilitating interchangeability and improvement of products, and assisting the pur- chaser in selecting and obtaining with minimum delay the proper product for his particular need. Existence of such Standards and Publications shall not in any respect preclude any member or nonmember of EIA or IPC from manufacturing or selling products not conforming to such Standards and Publications, nor shall the existence of such Standards and Publications preclude their voluntary use by those other than EIA or IPC members, whether the standard is to be used either domesti- cally or internationally. Recommended Standards and Publications are adopted by EIA and IPC without regard to whether their adoption may involve patents on articles, materials, or pro- cesses. By such action, EIA and IPC do not assume any liability to any patent owner, nor do they assume any obligation whatever to parties adopting the Recom- mended Standard or Publication. Users are also wholly responsible for protecting themselves against all claims of liabilities for patent infringement. The material in this joint standard was developed by the EIA Soldering Technology Committee (STC) and the IPC Component and Wire Solderability Specification Task Group (5-23b). For Technical Information Contact: Electronic Industries Association Engineering Department 2500 Wilson Boulevard Arlington, VA 22201 Phone (703) 907-7500 Fax (703) 907-7501 IPC 2215 Sanders Road Northbrook, IL 60646 Phone (847) 509-9700 Fax (847) 509-9798 Please use the Standard Improvement Form shown at the end of this document. ©Copyright 1998. The Electronics Industries Alliance, Arlington, Virginia, and the IPC, Northbrook, Illinois. All rights reserved under both international and Pan-American copyright conventions. Any copying, scanning or other reproduction of these materials without the prior written consent of the copyright holder is strictly prohibited and constitutes infringement under the Copyright Law of the United States. J-STD-002A Solderability Tests for Component Leads, Terminations, Lugs, Terminals and Wires A joint standard developed by the EIA Soldering Technology Committee (STC) and the Component and Wire Solderability Specification Task Group of IPC Users of this standard are encouraged to participate in the development of future revisions. Contact: EIA Engineering Department 2500 Wilson Boulevard Arlington, VA 22201 Phone (703) 907-7500 Fax (703) 907-7501 IPC 2215 Sanders Road Northbrook, IL 60062-6135 Phone (847) 509-9700 Fax (847) 509-9798 JOINT INDUSTRY STANDARD Acknowledgment Members of the EIA Soldering Technology Committee (STC) and the IPC Soldering Subcommittee (5–22) have worked together to develop this document. We would like to thank them for their dedication to this effort. Any Standard involving a complex technology draws material from a vast number of sources. While the principle members of the Soldering/Solderability Specifications Task Group are shown below, it is not possible to include all of those who assisted in the evolution of this Standard. To each of them, the members of the EIA and IPC extend their gratitude. Assembly & Joining Processes Committee Component and Wire Solderability Specification Task Group EIA Soldering Technology Committee Chair Jim Reed Raytheon TI System Chair Dave Hillman Rockwell Chair Mark Kwoka Harris Corporation Component and Wire Solderability Specifications Task Group L. Abbagnaro, Pace Inc. D. Adams, Rockwell International F.C. Albers, Unisys Corp. P.J. Amick, Mc Donnell Douglas Elec. Sys Co. J.E. Andrews, Hadco Corp. F. Anglade, Metronelec H.R. Armfield, Litton Data Systems A. Astbury, Altron Incorporated J. Baker, Repco Inc. C. Barrett, Pace Inc. G. Bates, Sherwood Medical A. Beikmohamadi, E I DuPont De Nemours & Co. J.G. Bernauer, Unisys Corp. D.F. Bernier, Kester Solder Division W. Bibins, AlliedSignal Aerospace R. Boerdner, EJE Research S.T. Bora, Smiths Industries E. Bradley, Motorola Inc. C. Bradshaw, Memorex Telex Corp. P. Bratin, ECI Technology Inc. C. Brill, AMP Inc. Dr. J. Brous, Alpha Metals Inc. K. Brown, Bourns Inc. T. Burnette, Motorola R. Burress, SEHO USA Inc. S.F. Caci, Raytheon Co. L.W. Canarr, Rockwell International J. Cannis, Amkor Elecronics T. Carroll, Raytheon Systems Company M. Carrozzo, Express Test Corp. G. Carter, MEC Inc. A. Cash, Northrop Grumman Corporation K.C. Chao, Lockheed Missiles & Space Co. W.A. Clark, AT&T Bell Laboratories H. Collins, AMP Incorporated E. Colokathis, Exotic Plating Lab Inc. D. Cotosky, Kester Solder Division L.A. Crouch, D. Currie, Teledyne Systems Co. G. Cushman, Eptac Corporation D. D’Andrade, The Surface Mount Technology Centre Inc. R. Dehne, OEM Worldwide J.A. DeVore, General Electric Co. M.D. Dillie, Magnavox R.J. Edgington, National Standard Co. D.A. Elliott, Electrovert Ltd. G. Estvander, Sundstrand Aerospace G.P. Evans, Indium Corp. of America J.W. Evans, NASA HQ H.S. Feldmesser, Johns Hopkins University J.R. Felty, Texas Instruments Inc. R. Fields, E I DuPont De Nemours & Co. J.R. Finnell, National Semiconductor A.D. Flaten, AT&T Information Systems D. Fritz, MacDermid Inc. J. Gamalski, Siemens AG J. Gechter, Delco Systems Operations P. Gildehaus, Allied Signal Aerospace C. Gonzalez, SCI Manufacturing Inc. J. Gordon Davy, Northrop Grumman Electronic Sensors & Systems Div C. Grimes, Thomson Consumer Electronics/RCA B. Gulati, Parker/Gull Electronic Sys Div V. Gundotra, Motorola Inc. W.B. Hampshire, Tin Information Ctr of N Amer C. Handwerker, U.S. Department of Commerce L. Hargreaves, DC. Scientific Inc. R. Hartbauer, Kester Solder Division J. Herard, IBM Corp./Endicott Electronic Packaging S. Herrberg, Hughes Defense Communications D. Hillman, Rockwell International P.E. Hinton, Hinton ‘‘PWB’’ Engineering R.R. Holmes, AT&T Microelectronics J.B. Hoppke, Alliant Techsystems Inc. J. Hudson, Sandia National Labs Albuquerque C. Hunt, National Physical Laboratory L. Hymes, Plexus Corp. R.C. Ihling, Lockheed Missiles & Space Co. B. Inpyn, Pitney Bowes Inc. A. Irvine, IRC M Jawitz, Litton Guidance & Control Sys. L.G. Johnson, General Electric Co. J-STD-002A October 1998 ii S.A. Jones, Wilcox Electric Inc. M. Kasilag, Aerojet Electrosystems Co. C. Kemp, Evenflo Company Inc. C. Kemp, General Electric Co. G.W. Kenealey, Control Data Corp. W.G. Kenyon, E I DuPont De Nemours & Co. K. Kirby, CAE-Link Corp. L.P. Knowles, Librascope Corp. T. Kokocinski, Northrop Corp. J. Koon, Raytheon TI Systems Inc. C. Korth, Hibbing Electronics Corp. R. Kraszewski, Kester Solder Division J. Kukelhan, SAIC V. Kumar, Martin-Marietta Electronics E.J. Kuntz, Alcatel Network Systems Inc. V. Kuo, EMPF M. Kwoka, Harris Corp. P. Kyne, DESC B. Lamb, GenCorp-Aerojet Electronic Systems L. Lambert, EPTAC Corporation J.P. Langan, Enthone-Omi Inc. F. Lee, Northrop Grumman Norden Systems D. LeMay, Cray Research Inc. R.B. Lomerson, General Dynamics K. Lin, Lucent Technologies Inc. L. Lynch, AT&T Microelectronics S.C. Mackzum, Ericsson GE J.E. Madison, CTS Corp. J.F. Maguire, Boeing Aerospace & Electronics J.R. Maki, Harris Corp. S. Mansilla, Robisan Laboratory Inc. C. Martin, Hewlett Packard Laboratories R. Martinez, Magnavox West Coast Operations R.E. Mc Lean, Storage Technology Corp. S. Meeks Jr., Lexmark International/ IBM Corp. J.H. Moffitt, U.S. Navy Marsha Moore, Lytton Inc. G. Munie, Lucent Technologies Inc. R.D. Nicholas, London Chemical Co Inc. R.L. Nielsen, Fastman Kodak Co Kad R.B. Officer, Lockheed Sanders Inc. R. Parker, Hewlett Packard Laboratories J.L. Parker, Viasystems Technologies Corp. H.E. Parkinson, Digital Equipment Corp. R. Payne, Sundstrand Data Control Inc. K. Pfrimmer, OMG Americas R.J. Phillips, Lorain Products P.J. Plonski, Photocircuits Corp. R. Pond, Texas Instruments Inc. J. Porter, Multicore Solders P.J. Quinn, General Electric Co. M. Qurashi, U.S. Navy J. Raby, Soldering Technology International R. Ramos, Trace Laboratories—East J. Reed, Raytheon TI Systems Inc. J.R. Reed, Texas Instruments Inc. P.M. Rehm, Intel Corp. M. Reithinger, Siemens AG Tony Reyes, AMD N. Reynolds, Kemet Electronics Corp. W. Reynolds, Texas Instruments D.E. Robertson, Pace Inc. D. Romm, Texas Instruments J.G. Rosser, Hughes Aircraft Co. A.B. Rotman, DCMR Boston (Dept of Defense) M. Rubin, Sprague Electric Dr. W. Rubin, Multicore Solders D. Rudy, AT&T Bell Laboratories D.W. Rumps, AT&T Technology Systems N. Rusignuolo, Hexacon Electric Co. H.J. Russell, Defense General Supply Center W.R. Russell, Texas Instruments Inc. A. Scarcella, DCMDE - QTDP (Dept. of Defense) D. Scheiner, Kester Solder Division A. Schneider, Alpha Metals Inc. D. Schoenthaler, AT&T Bell Laboratories Gene Schrader, Motorola R. Sengupta, Electronics Regional Test Lab W. Sepp, Technic Inc. J.T. Slanina, Allied Signal Aerospace Ed Small , Multicore W.A. Smith, General Dynamics N. Socolowski, Alpha Metals Inc. B. Sonia, Texas Instruments J.R. Sovinsky, Indium Corp. of America A. Starosta, Eldec Corp. W.N. Stover, Philips Components (MEPCOPAL) C.J. Sworin, Kester Solder Division C. Sworin, Kester Solder Division K. Tellefsen, Alpha Metals Inc. G. Theroux, Honeywell Inc. P.A. Thibodeau, Digital Equipment K. Thorson, Unisys Corporation E. Tidwell, DSC Communications Corporation S. Todd, Berg Electronics Dr. L.J. Turbini, Georgia Institute/ Technology H. Underwood, U.S. Air Force D. Varnell, Hercules Inc. D.A. Vaughan, E I DuPont De Nemours & Co. N. Virmani, NASA/Goddard Space Flight Center E. Vollmar, Methode Electronics Inc. B. Waller, Texas Instruments Inc. K. Warren, Corlund Electronics Corp. K. Wengenroth, Enthone-OMI Inc. C.E.T. White, Indium Corp. of America R. N. Wild, IBM Corp. D. Wolf, Hadco Corp. M. Wolverton, Texas Instruments Inc. Dr. T. S. Won, Allied Signal Aerospace R. Woodgate, Woodcorp Inc. J.R. Wooldridge, Rockwell International J. Wyatt, EIA R.O., Young, Rockwell International W., Younger, PC World—Orange County October 1998 J-STD-002A iii Table of Contents 1 SCOPE......................................................................... 1 1.1 Scope .................................................................... 1 1.2 Purpose................................................................. 1 1.3 Method Classification .......................................... 1 1.3.1 Tests with Established Accept/Reject Criterion ............................................................... 1 1.3.2 Test without Established Accept/Reject Criterion ............................................................... 1 1.4 Coating Durability ............................................... 1 1.5 Referee Verification Solder Dip for Tests A, B, C........................................................ 1 1.6 Limitation............................................................. 1 1.7 Contractual Agreement ........................................ 2 2 APPLICABLE DOCUMENTS ...................................... 2 2.1 Industry ................................................................ 2 2.1.1 IPC........................................................................ 2 2.2 Government.......................................................... 2 2.2.2 Federal.................................................................. 2 3 REQUIREMENTS ........................................................ 2 3.1 Terms And Definitions......................................... 2 3.2 Materials............................................................... 2 3.2.1 Solder ................................................................... 2 3.2.2 Flux ...................................................................... 2 3.2.3 Flux Removal....................................................... 2 3.2.4 Standard Copper Wrapping Wire ........................ 3 3.3 Equipment ............................................................ 3 3.3.1 Steam Aging Apparatus ....................................... 3 3.3.2 Solder Pot............................................................. 3 3.3.3 Optical Inspection Equipment ............................. 3 3.3.4 Dipping Equipment.............................................. 3 3.3.5 Timing Equipment ............................................... 3 3.4 Preparation for Testing ....................................... 3 3.4.1 Specimen Preparation and Surface Condition.............................................................. 3 3.4.2 Steam Aging......................................................... 4 3.4.3 Surfaces To Be Tested ......................................... 4 3.5 Solder Bath Requirements ................................... 4 3.5.1 Solder Temperatures ............................................ 4 3.5.2 Solder Contamination Control............................. 4 4 TEST PROCEDURES ................................................. 5 4.1 Application of Flux.............................................. 5 4.2 Tests with Established Accept/Reject Criterion ............................................................... 5 4.2.1 Test A – Solder Bath/Dip and Look Test (Leads, Wires, etc.) .............................................. 5 4.2.2 Test B – Solder Bath/Dip and Look Test (Leadless Components)........................................ 7 4.2.3 Test C – Wrapped Wire Test (Lugs, Tabs, Terminals, Large Stranded Wire) ........................ 7 4.2.4 Test D – Resistance to Dissolution of Metallization Test................................................. 9 4.2.5 Test S – Surface Mount Process Simulation Test .................................................... 9 4.3 Tests without Established Accept/Reject Criterion ............................................................. 10 4.3.1 Test E – Wetting Balance Test (Leaded Components) ...................................................... 10 4.3.2 Test F – Wetting Balance Test (Leadless Components) ...................................................... 11 5 NOTES ...................................................................... 13 5.1 Test Equipment Sources .................................... 13 5.1.1 Tests A, B, C, D ............................................... 13 5.1.2 Tests E & F ....................................................... 13 5.1.3 Steam Aging Equipment .................................. 13 5.1.4 Grid Reticles ..................................................... 13 5.2 Use of Non-Activated Flux ............................... 13 5.3 Massive Components ......................................... 13 5.4 Sampling Plans .................................................. 13 5.5 Safety Notes....................................................... 13 5.6 Correction for Buoyancy ................................... 13 5.7 Test Specimens................................................... 14 5.8 Accelerated Steam Aging Limitations .............. 14 5.9 Referee Magnification........................................ 14 Appendix A ................................................................. 15 Appendix B ................................................................ 22 Appendix C ................................................................. 27 Appendix D ................................................................. 28 Figures Figure 1 Example Reticle................................................. 4 Figure 2 Dipping Schematic............................................. 6 Figure 3 Solder Dipping Angle for Surface Mount Leaded Components ......................................... 6 Figure 4 Solder Dipping Depth for Through-Hole Components....................................................... 7 Figure 5 Leadless C omponent Immersion Depth........... 7 Figure 6 ........................................................................... 8 J-STD-002A October 1998 iv Figure 7 Wetting Balance Apparatus.............................. 11 Figure 8 Set A Wetting Curve ........................................ 12 Figure 9 Set B Wetting Curve........................................ 12 Figure A-1 ‘‘J’’ Leaded Components.................................. 15 Figure A-2 Passive Components....................................... 16 Figure A-3 Gull Wing Components.................................... 17 Figure A-4 Leadless Chip Carrier...................................... 18 Figure A-5 ‘‘L’’ Leaded Component ................................... 19 Figure A-6 Pin-In-Hole Component ................................... 20 Figure A-7 Pin-In-Hole Component ................................... 21 Figure B-1 Defect Size Aid ................................................ 22 Figure B-2 Types of Solderability Defects ......................... 23 Figure B-3 Aids in Evaluation of 5% Allowable Area of Pin Holes ............................................ 24 Figure B-4 Aid in Evaluation of 5% Allowable Area of Pin Holes ............................................ 25 Figure B-5 Solderability Coverage Guide.......................... 26 Figure C-1 Lead Periphery and Volume for a 132 I/O PQFP .................................................. 27 Tables Table 1 Steam Aging Categories for Component Leads and Terminations ................... 1 Table 2 Steam Temperature Requirements ...................... 3 Table 3 Solderability Test Selection Component Type...... 5 Table 4 Maximum Limits of Solder Bath Contaminant ..... 5 Table 5 Stencil Thickness Requirements........................ 10 Table 6 Reflow Parameter Requirements ....................... 10 Table 7 Wetting Balance Parameter and Suggested Evaluation Criteria .............................................. 12 October 1998 J-STD-002A v This Page Intentionally Left Blank J-STD-002A October 1998 vi T October 1998 J-STD-002A These methods are included for evaluation purposes only. Data collected should be submitted to the IPC-Wetting Bal- ance Task Group for correlation and analysis. 1.4 Coating Durability The following are guidelines for determining the needed level of steam age category assur- procedure, examination interpretation, or of poor compo- nent quality. 1.6 Limitation This standard shall not be construed as a production procedure for the pretinning of leads and termi- nations. Solderability Tests fo Terminations, Lugs, 1 SCOPE 1.1 Scope This standard prescribes test methods, defect definitions, acceptance criteria, and illustrations for assess- ing the solderability of electronic component leads, termi- nations, solid wire, stranded wire, lugs, and tabs. This stan- dard is intended for use by both vendor and user. 1.2 Purpose Solderability evaluations are made to verify that the solderability of component leads and terminations meets the requirements established in this standard and that subsequent storage has had no adverse effect on the ability to solder components to an interconnecting substrate. Determination of solderability can be made at the time of manufacture, at receipt of the components by the user, or just before assembly and soldering. The resistance to dissolution of metallization determination is made to verify that metallized terminations will remain intact throughout the assembly soldering processes. 1.3 Method Classification This standard describes meth- ods by which component leads or terminations may be evaluated for solderability. Test A, Test B, or Test C and Test D, unless otherwise agreed upon between vendor and user, are to be used for each application as a default. 1.3.1 Tests with Established Accept/Reject Criterion Test A – Solder Bath/Dip and Look Test (Leaded Compo- nent