SD卡操作时序说明

------------------------------------------作者xxxx------------------------------------------日期xxxxSD卡操作时序说明【精品文档】【精品文档】【精品文档】【精品文档】【精品文档】【精品文档】HowtoUseMMC/SDCUpdate:November3,2010TheSecureDigitalMemoryCard(SDCbelow)isthedefactostandardmemorycardformobileequipments.TheSDCwasdeveloppedasupper-compatibletoMultiMediaCard(MMCbelow).SDCcompleantequipmentscanalsouseMMCsinmostcase.Therearealsoreducedsizeversions,suchasRS-MMC,miniSDandmicroSD,withthesamefunction.TheMMC/SDChasamicrocontrollerinit.Theflashmemorycontrols(erasing,reading,writing,errorcontrolsandwearleveling)arecompletedinsideofthememorycard.Thedataistransferredbetweenthememorycardandthehostcontrollerasdatablocksinunitof512bytes,sothatitcanbeseenlikeagenericharddiskdrivesfromviewpointofupperlevellayers.ThecurrentrydefinedfilesystemforthememorycardisFAT12/16withFDISKpatitioningrule.TheFAT32isdefinedforonlyhighcapacity(>=4G)cards.ThispagedescribesthebasicknowledgeandmiscellaneousthingsthatIbecomeaware,onusingMMC/SDCwithsmallembeddedsystem.IbelievethatthisinformationmustbeausefulgettingstartednotesforthepeoplewhoisgoingtouseMMC/SDContheelectronicshandiworkprojects.PinoutHYPERLINK"http://elm-chan.org/docs/mmc/mini_contact.jpeg"miniSD|HYPERLINK"http://elm-chan.org/docs/mmc/micro_contact.jpeg"microSDRightphotoshowsthecontactsurfaceoftheSDC/MMC.TheMMChassevencontactpadsandtheSDChasninecontactpadsthattwoadditionalcontactstoMMC.Thethreeofthecontactsareassignedforpowersupplysothatthenumberofeffectivesignalsarefour(MMC)andsix(SDC).Therforethedatatransferbetweenthehostandthecardisdoneviaasynchronousserialinterface.2.7to3.6voltsatleast.Thecurrentconsumptiononwriteoperationcanreachuptosometenmiliamperes,sothatthehostsystemshouldconsidertosupply100miliamperestothacard.SPIModeThisdocumentdescribestheprotocoltocontrolMMC/SDCsinHYPERLINK"http://elm-chan.org/docs/spi_e.html"SPImode.TheSPImodeisanalternativeoperatingmodethatdefinedtousetheMMC/SDCswithoutnativehostinterface.ThecommunicationprotocolfortheSPImodeissimplecomparedtoitsnativeoperatingmode.TheMMC/SDCcanbeattachedtothemostmicrocontrollersviaagenericSPIinterfaceorGPIOports.ThereforetheSPImodeissuitableforlowcostembeddedapplications.Especialy,thereisnoreasontoattempttousenativemodewithacheapmicrocontrollerthathasnonativehostinterface.FortheSDC,theSPImode0isdefinedforitsSPImode.FortheMMC,itisnottheSPItiming,bothlatchandshiftactionsaredefinedwithrisingedgeoftheSCLK,butitseemsworkinSPImode0inSPImode.ThustheSPIMode0(CPHA=0,CPOL=0)isthepropersettingforMMC/SDCinterface,butSPImode3alsoworksaswellinmostcase.CommandandResponseInSPImode,thedatadirectiononthesignallineisfixedandthedataistransferredinbyteorientedserialcommunication.Thecommandframefromhosttocardisafixedlength(sixbytes)packetthatshownbelow.Whenacommandframeistransmittedtothecard,aresponsetothecommand(R1,R2orR3)issentbackfromthecard.Becausethedatatransferisdrivenbyserialclockgeneratedbyhost,thehostmustcontinuetoreadbytesuntilreceiveanyvalidresponse.TheDIsignalmustbekepthighduringreadtransfer(senda0xFFandgetthereceiveddata).Theresponseissentbackwithincommandresponsetime(NCR),0to8bytesforSDC,1to8bytesforMMC.TheCSsignalmustsetlowpriortosendacommandframeandheldlowduringthetransaction(command,responseanddatatransferifexist).TheCRCfeatureisoptionalinSPImodebuttheCRCfieldisalwaysrequiredtocomposeacommandframe.SPICommandSetEachcommandisexpressedinabbreviationlikeGO_IDLE_STATEorCMD,isthenumberofthecommandindexandthevaluecanbe0to63.Followingtabledescribesonlycommandsthattobeusuallyusedforgenericread/writeandcardinitialization.Fordetailsonallcommands,pleaserefertospecsheetsfromMMCAandSDCA.CommandIndexArgumentResponseDataAbbreviationDescriptionCMD0None(0)R1NoGO_IDLE_STATESoftwarereset.CMD1None(0)R1NoSEND_OP_CONDInitiateinitializationprocess.ACMD41(*1)*2R1NoAPP_SEND_OP_CONDForonlySDC.Initiateinitializationprocess.CMD8*3R7NoSEND_IF_CONDForonlySDCV2.Checkvoltagerange.CMD9None(0)R1YesSEND_CSDReadCSDregister.CMD10None(0)R1YesSEND_CIDReadCIDregister.CMD12None(0)R1bNoSTOP_TRANSMISSIONStoptoreaddata.CMD16Blocklength[31:0]R1NoSET_BLOCKLENChangeR/Wblocksize.CMD17Address[31:0]R1YesREAD_SINGLE_BLOCKReadablock.CMD18Address[31:0]R1YesREAD_MULTIPLE_BLOCKReadmultipleblocks.CMD23Numberofblocks[15:0]R1NoSET_BLOCK_COUNTForonlyMMC.Definenumberofblockstotransferwithnextmulti-blockread/writecommand.ACMD23(*1)Numberofblocks[22:0]R1NoSET_WR_BLOCK_ERASE_COUNTForonlySDC.Definenumberofblockstopre-erasewithnextmulti-blockwritecommand.CMD24Address[31:0]R1YesWRITE_BLOCKWriteablock.CMD25Address[31:0]R1YesWRITE_MULTIPLE_BLOCKWritemultipleblocks.CMD55(*1)None(0)R1NoAPP_CMDLeadingcommandofACMDcommand.CMD58None(0)R3NoREAD_OCRReadOCR.*1:ACMDmeansacommandsequenseofCMD55-CMD.*2:Rsv(0)[31],HCS[30],Rsv(0)[29:0]*3:Rsv(0)[31:12],SupplyVoltage(1)[11:8],CheckPattern(0xAA)[7:0]SPIResponseTherearethreecommandresponseformats,R1,R2andR3,dependsonthecommandindex.AbyteofresponseR1isreturnedformostcommands.ThebitfieldofR1responseisshowninrightimage,thevalue0x00meanssuccessful.Whenanyerroroccured,correspondingstatusbitintheresponsewillbeset.TheR3response(R1andtrailing32-bitOCR)isforonlyCMD58.SomecommandstakeatimelongerthanNCRanditrespondsR1b.ItisanR1responsefollowedbybusyflag(DOisheldlowaslongasinternalprocessisinprogress).ThehostcontrollershouldwaitforendoftheprocessuntilDOgoeshigh(0xFFisreceived).InitializationProcedureforSPIModeAfterpoweronreset,MMC/SDCentersitsnativeoperatingmode.ToputitSPImode,follwingproceduremustbeperformedlikeHYPERLINK"http://elm-chan.org/docs/mmc/sdinit.png"thisflow.PowerON(Insersion)Aftersupplyvoltagereached2.2volts,waitforamillisecondatleast.SetSPIclockratebetween100kHzand400kHz.SetDIandCShighandapply74ormoreclockpulsestoSCLK.Thecardwillenteritsnativeoperatingmodeandgoreadytoacceptnativecommands.SoftwareResetSendaCMD0withCSlowtoresetthecard.ThecardsamplesCSsignalonaCMD0isreceivedsuccessfully.IftheCSsignalislow,thecardentersSPImodeandrespondsR1withInIdleStatebit(0x01).SincetheCMD0mustbesentasanativecommand,theCRCfieldmusthaveavalidvalue.WhenoncethecardentersSPImode,theCRCfeatureisdisabledandtheCRCisnotcheckedbythecardsothatcommandtransmissionroutinecanbewrittenwiththehardcordedCRCvaluethatvalidforonlyCMD0andCMD8withtheargumentofzero.TheCRCfeaturecanalsobeswitchedwithCMD59.InitializationInidlestate,thecardacceptsonlyCMD0,CMD1,ACMD41,CMD58andCMD59.Anyothercommandswillberejected.Inthistime,readOCRregisterandcheckworkingvoltagerangeofthecard.Incaseofthesystemsypplyvoltageisoutofworkingvoltagerange,thecardmustberejected.Notethatallcardsworkatsupplyvoltagerangeof2.7to3.6voltsatleast.ThecardinitiatesinitializationwhenaCMD1isreceived.Todetectendoftheinitializationprocess,thehostcontrollermustsendCMD1andchecktheresponseuntilendoftheinitialization.Whenthecardisinitializedsuccessfuly,InIdleStatebitintheR1responseiscleared(R1respchanges0x01to0x00).Theinitializationprocesscantakehundredsofmilliseconds(largecardstendtolonger),sothatthisisaconsiderationtodeterminthetimeoutvalue.AftertheInIdleStatebitcleared,genericread/writecommandswillabletobeaccepted.BecauseACMD41insteadofCMD1isrecommendedforSDC,tryingACMD41firstandretrywithCMD1ifrejected,isidealtosupportbothtypeofthecards.TheSPIclockrateshouldbechangedtofastaspossibletomaximizetheread/writeperformance.TheTRAN_SPEEDfieldintheCSDregisterindicatesthemaximumclockrateofthecard.Themaximumclockrateis20MHzforMMC,25MHzforSDCinmostcase.Notethattheclockratewillabletobefixedto20/25MHzinSPImodebecausethereisnoopen-drainconditionthatrestrictstheclockrate.Theinitialread/writeblocklengthcanbeset1024on2GBcards,sothattheblocksizeshouldbere-initializedto512withCMD16toworkwithFATfilesystem.HowtosupportSDCVer2andhighcapacitycardsAfterthecardentersidlestatewithaCMD0,sendaCMD8withargumentof0x000001AAandcorrectCRCpriortoinitializationprocess.WhentheCMD8isrejectedwithanilligalcommanderror(0x05),thecardisSDCV1orMMC.WhentheCMD8isaccepted,R7response(R1(0x01)andtrailing32bitdata)willbereturned.Thelower12bitsinthereturnvalue0x1AAmeansthatthecardisSDCV2anditcanworkatvoltagerangeof2.7to3.6volts.Ifnotthecase,thecardmustberejected.AndtheninitiateinitializationwithACMD41withHCS(bit30).Aftertheinitializationcompleted,readOCRregisterandcheckCCS(bit30).Whenitisset,subsequentdataread/writeoperationsthatdescribedbelowarecommandedinblockaddressinstedofbyteaddress.Theblocksizeisalwaysfixedto512bytes.DataTransferDataPacketandDataResponseInatransactionwithdatatransfer,oneormoredatablockswillbesent/receivedaftercommandresponse.ThedatablockistransferredasadatapacketthatconsistofToken,DataBlockandCRC.Theformatofthedatapacketisshowininrightimageandtherearethreedatatokens.AsforStopTrantokenthatmeansendofmultipleblockwrite,itisusedinsinglebytewithoutdatablockandCRC.SingleBlockReadTheargumentspecifiesthelocationtostarttoreadinunitofbyteorblock.Thesectoraddressspecifiedbyupperlayermustbescaledproperly.WhenaCMD17isaccepted,areadoperationisinitiatedandthereaddatablockwillbesenttothehost.Afteravaliddatatokenisdetected,thehostcontrollerreceivesfollowingdatafieldandtwobyteCRC.TheCRCbytesmustbeflushedevenifitisnotneeded.Ifanyerroroccuredduringthereadoperation,anerrortokenwillbereturnedinsteadofdatapacket.MultipleBlockReadTheMultipleBlockReadcommandreadsmultipleblocksinsequensefromthespecifiedaddress.Whennumberoftransferblockshasnotbeensepecifiedbeforethiscommand,thetransactionwillbeinitiatedasanopen-endedmultipleblockread,thereadoperationwillcontinueuntilstoppedwithaCMD12.ThereceivedbyteimmediatalyfollowingCMD12isastuffbyte,itshouldbediscardedbeforereceivetheresponseoftheCMD12.SingleBlockWriteWhenawritecommandisaccepted,thehostcontrollersendsadatapackettothecardafterabytespace.ThepacketformatissameasBlockReadcommand.TheCRCfieldcanhaveanyinvalidvalueunlesstheCRCfunctionisenabled.Whenadatapackethasbeensent,thecardrespondsaDataResponseimmediatalyfollowingthedatapacket.Thedataresponsetrailsabusyflagtoprocessthewriteoperation.Mostcardscannotchangewriteblocksizeanditisfixedto512.InprincipleoftheSPImode,theCSsignalmustbeassertedduringatransaction,howeverthereisanexceptiontothisrule.Whenthecardisbusy,thehostcontrollercandeassertCStoreleaseSPIbusforanyotherSPIdevices.ThecardwilldriveDOsignallowagainwhenreselectitduringinternalprocessisinprogress.Thereforeaprecedingbusycheck(waitreadyimmediatalybeforecommandanddatapacket)insteadofpostwaitcaneliminatewastewaittime.Inadditiontheinternalprocessisinitiatedabyteafterthedataresponse,thismeanseightclocksarerequiredtoinitiateinternalwriteoperation.ThestateofCSsignalduringtheeightclocksisnegligiblesothatitcandonebybusreleaseprocessdescribedbelow.MultipleBlockWriteTheMultipleBlockReadcommandwritesmultipleblocksinsequensefromthespecifiedaddress.Whennumberoftransferblockshasnotbeensepecifiedpriortothiscommand,thetransactionwillbeinitiatedasanopen-endedmultipleblockwrite,thewriteoperationwillcontinueuntilitisterminatedwithaStopTrantoken.ThebusyflagwillappearontheDOlineabyteaftertheStopTrantoken.AsforSDC,themultipleblockwritetransactionmustbeterminatedwithaStopTrantokenindependentofthetransfertype,pre-definedoropen-ended.ReadingCSDandCIDThesearesameasSingleBlockReadexceptforthedatablocklength.TheCSDandCIDaresenttothehostas16bytedatablock.FordetailsoftheCMD,CIDandOCR,pleaserefertotheMMC/SDCspecs.CosiderationtoBusFloatingandHotInsertionAnysignalsthatcanbefloatedshouldbepulledloworhighproperlyviaaresister.ThisisagenericdesignruleonMOSdevices.BecauseDIandDOarenormallyhigh,theyshouldbepulled-up.AccordingtoSDC/MMCspecs,from50kto100kohmsisrecommendedtothevalueofpull-upregisters.HowevertheclocksignalisnotmentionedintheSDC/MMCspecsbecauseitisalwaysdrivenbyhostcontroller.Whenthereisapossibilityoffloating,itshouldbepulledtothenormalstate,low.TheMMC/SDCcanhotinsertion/removalbutsomeconsiderationstothehostcircuitareneededtoavoidanincorrectoperation.Forexample,ifthesystempowersupply(Vcc)istiedtothecardsocketdirectly,theVccwilldipattheinstantofcontactclosedduetoachargecurrenttothecapacitorthatbuiltinthecard.'A'intherightimageisthescopeviewanditshowsthatoccureingavoltagedipofabout600millivolts.Thisisasufficientleveltotriggerabrownoutdetector.'B'intherightimageshowsthataninductorisinsertedtoblockthesurgecurrent,thevoltagedipisreducedto200millivoits.AlowESRcapacitor,suchasOS-CON,caneliminatethevoltagedipdratiscallylikeshownin'C'.HoweverthelowESRcapacitorcancauseanoscillationofLDOregulator.CosiderationonMulti-slaveConfigurationIntheSPIbus,eachslavedeviceisselectedwithseparatedCSsignals,andpluraldevicescanbeattachedtoanSPIbus.GenericSPIslavedevicedrives/releasesitsDOsignalbyCSsignalasynchronouslytoshareanSPIbus.HoweverMMC/SDCdrives/releasesDOsignalinsynchronisingtotheSCLK.ThismeansthereisaposibilityofbusconflictwithMMC/SDCandanyotherSPIslavesthatattachedtoanSPIbus.Rightimageshowsthedrive/releasetimingoftheMMC/SDC(theDOsignalispulledto1/2vcctoseethebusstate).ThereforetomakeMMC/SDCreleaseDOsignal,themasterdevicemustsendabyteafterCSsignalisdeasserted.OptimizationofWritePerformanceMostMMC/SDCemploysHYPERLINK"http://elm-chan.org/docs/sm_e.html"NANDFlashMemoryasamemoryarray.TheNANDflashmemoryiscosteffectiveanditcanread/writelargedatafast,butontheotherhand,thereisadisadvantagethatrewritingapartofdataisinefficient.Generallytheflashmemoryrequirestoeraseexistingdatabeforewriteanewdata,andminimumunitoferaseoperation(callederaseblock)islargerthanwriteblocksize.ThetypicalNANDflashmemoryhasablocksizeof512/16Kbytesforwrite/eraseoperation,andrecentmonstercardemployslargeblockchip(2K/128K).Thismeansthatrewritingentiredataintheeraseblockisdoneinthecardevenifwriteonlyasector(512bytes).BenchmarkIexaminedtheread/writeperformanceofHYPERLINK"http://elm-chan.org/docs/mmc/sdmm.jpeg"someMMC/SDCwithacheap8bitMCU(ATmega64@9.2MHz)ontheassumptionthatanembeddedsystemwithlimitedmemorysize.Forreasonofmemorysize,write()andread()wareperformedin2048bytesatatime.Theresultis:Write:77kB/sec,Read:328kB/secontheHYPERLINK"http://elm-chan.org/docs/mmc/sd128.txt"128MBSDC,Write:28kB/sec,Read:234kB/secontheHYPERLINK"http://elm-chan.org/docs/mmc/sd512.txt"512MBSDCandWrite:182kB/sec,Read:312kB/secontheHYPERLINK"http://elm-chan.org/docs/mmc/mm128.txt"128MBMMC.Thereforthewriteperformanceofthe512MBSDCwasverypoorthatonethirdvalueof128MBSDC.Generallytheread/writeperformanceofthemassstoragedeviceincreasesproportionaltoitsrecordingdensity,howeveritsometimesappearsatendencyofoppositeonthememorycard.AsfortheMMC,itseemstobeseveraltimesfasterthanSDC,itisnotbadperformance.Afterthattime,IexaminedsomeSDCssuppliedfromdifferentmakers,andIfoundthatPQI'sSDCwasasfastasHitachi'sMMCbutPanasonic'sandToshiba'sonewasverypoorperformances.EraseBlockSizeToanalysdetailofwriteoperation,busytime(numberofpollingcycles)aftersentawritedataistypedouttoconsoleinthelowleveldiskwritefunction.MultiplenumbersonalineindicatesdatablocksandaStopTrantokenthatissuedbyamultipleblockwritetransaction.Inresulutoftheanalysis,thereisadifferentofinternalprocessbetween128MBSDCand512MBSDC.The128MBSDCrewriteseraseblockatendofthemutipleblockwritetransaction.The512MBSDCseemshave4Kbytesdatabufferanditrewriteseraseblockevery4Kbytesboundary.Thereforitcannotcompareddirectlybuttheprocessingtimeofrewritinganeraseblockcanberead3800for128MBSDCandthe512MBSDCtaeks30000that8timeslongerthan128MBSDC.Judgingfromthisresulut,itseemsthe128MBSDCusesasmallblockchipandthe512MBSDCusesalargeblockorMLCchip.Ofcoursethelargerblocksizedecreasestheperformanceonpertialblockrewriting.In512MBSDC,onlyanareathat512Kbytesfromtopofthememoryisrelativelyfast.Thiscanbereadfromwritetimeinclose().ItmightanyspecialprocessingisappliedtothisareaforfastFATaccsess.ImprovingWritePerformanceToavoidthisbottleneckandincreasethewriteperformance,numberofblocksperwritetransactionmustbelargeaspossible.Ofcoursealllayersbetweentheapplicationandthemediamustsupportmultiplesectorwritefeature.ForlowlevelSDC/MMCwritefunction,itshouldinformnumberofwritesectorstothecardpriortothewritetransactionforefficientinternalwriteprocess.Thismethodcalled`pre-definedmultipleblockwrite'.Thepre-definitioncommandisnotthesamebetweenMMC(CMD23)andSDC(ACMD23).Thememorycardsareinitiallypatitionedandformattedtoaligntheallocationunittotheeraseblock.Whenre-patitionorre-formatthememorycardwithadevicethatnotcomplianttoMMC/SDC(thisisjustaPC)withnocare,theoptimizationwillbebrokenandthewriteperformancemightbelost.Itriedtore-format512MBSDCinFAT32withaPC,thewriteperformancemeasuredinfilecopywaslowerdtooneseveral.Thereforethere-formattingthecardshouldbedonewithMMC/SDCcompliantequipmentsratherthanPC.