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S5PV210_iROM_ApplicationNote_Preliminary_20091126

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S5PV210_iROM_ApplicationNote_Preliminary_20091126 1 Confidential Proprietary of Samsung Electronics Co., Ltd Copyright © 2008 Samsung Electronics, Inc. All Rights Reserved Application Note (Internal ROM Booting) S5PV210 RISC Microprocessor NOV 23, 2009 Preliminary REV 0.3 ...
S5PV210_iROM_ApplicationNote_Preliminary_20091126
1 Confidential Proprietary of Samsung Electronics Co., Ltd Copyright © 2008 Samsung Electronics, Inc. All Rights Reserved Application Note (Internal ROM Booting) S5PV210 RISC Microprocessor NOV 23, 2009 Preliminary REV 0.3 Preliminary product information describe products that are in development, for which full characterization data and associated errata are not yet available. Specifications and information herein are subject to change without notice. S5PV210_IROM_APPLICATION NOTE_REV 0.3 2 Preliminary product information describe products that are in development, for which full characterization data and associated errata are not yet available. Specifications and information herein are subject to change without notice. Samsung Confidential Important Notice The information in this publication has been carefully checked and is believed to be entirely accurate at the time of publication. Samsung assumes no responsibility, however, for possible errors or omissions, or for any consequences resulting from the use of the information contained herein. Samsung reserves the right to make changes in its products or product specifications with the intent to improve function or design at any time and without notice and is not required to update this documentation to reflect such changes. This publication does not convey to a purchaser of semiconductor devices described herein any license under the patent rights of Samsung or others. Samsung makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Samsung assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability, including without limitation any consequential or incidental damages. “Typical” parameters can and do vary in different applications. All operating parameters, including “Typicals” must be validated for each customer application by the customer’s technical experts. Samsung products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, for other applications intended to support or sustain life, or for any other application in which the failure of the Samsung product could create a situation where personal injury or death may occur. Should the Buyer purchase or use a Samsung product for any such unintended or unauthorized application, the Buyer shall indemnify and hold Samsung and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, expenses, and reasonable attorney fees arising out of, either directly or indirectly, any claim of personal injury or death that may be associated with such unintended or unauthorized use, even if such claim alleges that Samsung was negligent regarding the design or manufacture of said product . S5PV210 RISC Microprocessor IROM(Internal ROM) Booting Application Note, Preliminary Revision 0.3 Copyright © 2009-2010 Samsung Electronics Co.,Ltd. All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electric or mechanical, by photocopying, recording, or otherwise, without the prior written consent of Samsung Electronics Co.,Ltd. Samsung Electronics Co., Ltd. San #24 Nongseo-Dong, Giheung-Gu Yongin-City Gyeonggi-Do, Korea 446-711 Home Page: http://www.samsungsemi.com/ E-Mail: mobilesol.cs@samsung.com Printed in the Republic of Korea S5PV210_IROM_APPLICATION NOTE_REV 0.3 3 Preliminary product information describe products that are in development, for which full characterization data and associated errata are not yet available. Specifications and information herein are subject to change without notice. Samsung Confidential Revision History Revision No Description of Change Refer to Author(s) Date 0.00 - Initial release for review - s.w baik May 20, 2009 0.10 - Adding boot device option Changing boot code copy method k.j kim SEP 26, 2009 0.20 - Revised Figure 1, Figure 2 k.j kim NOV 19, 2009 0.30 - Update boot flow Adding ERROR Handling k.j kim NOV 23, 2009 NOTE: Revised parts are written in blue. S5PV210_IROM_APPLICATION NOTE_REV 0.3 4 Preliminary product information describe products that are in development, for which full characterization data and associated errata are not yet available. Specifications and information herein are subject to change without notice. Samsung Confidential Table of Contents 1 Overview................................................................................................................ 5 1.1 H/W Feature........................................................................................................................................ 5 1.2 Feature................................................................................................................................................ 5 1.3 Advantage of iROM booting................................................................................................................ 6 1.4 Circuit Design Check Point ................................................................................................................. 6 2 Operation ............................................................................................................... 7 2.1 Operating Sequence ........................................................................................................................... 7 2.2 iROM(BL0) boot-up sequence (Refer 2.3 V210 boot-up diagram)..................................................... 8 2.3 V210 boot-up diagram ........................................................................................................................ 9 2.4 iROM 2nd boot-up sequence when 1st boot fail.................................................................................. 10 2.4.1 UART boot mode ............................................................................................................................. 11 2.4.2 USB boot mode................................................................................................................................ 12 2.5 Memory Map ....................................................................................................................................... 13 2.6 Global Variable ................................................................................................................................... 14 2.7 Device Copy Function......................................................................................................................... 14 2.8 Boot Block Assignment Guide ............................................................................................................ 19 2.9 Header information data for Boot Code description ........................................................................... 20 2.10 Making checksum example code...................................................................................................... 21 2.11 Clock Configuration........................................................................................................................... 21 3 Boot configuration .................................................................................................. 22 4 Feature of the IROM Boot mode............................................................................ 23 5 ERROR HANDLING .............................................................................................. 24 6 Hardware Guide..................................................................................................... 26 6.1 Power connection reference of eMMC booting .................................................................................. 26 S5PV210_IROM_APPLICATION NOTE_REV 0.3 5 Preliminary product information describe products that are in development, for which full characterization data and associated errata are not yet available. Specifications and information herein are subject to change without notice. Samsung Confidential 1 Overview This chapter explains overall scheme of internal ROM(iROM) boot with memory devices such as Samsung MoviNAND/iNand, MMC/SD Card ,pure Nand, eMMC, eSSD, UART and USB boot with iROM is supported. In S5PV210, iROM boot releases retention I/O(resets I/O) when it wakes up for recognizing Boot Device by OM pin. Refer section1.4. 1.1 H/W Feature To use IROM boot loader, several hardware features are required. z S5PV210X microprocessor based on CortexA8 z 64KB Internal ROM (iROM) z 96KB Internal SRAM z General SDRAM and Controller z 4/8 Bit High Speed SD/MMC Controller 4-bit SD / 4-bit MMC / 4 or 8-bit eMMC z Nand Flash Controller z OneNand Controller(AUDI) z eSSD Controller z UART/USB contorller 1.2 Feature z OneNand Boot(Mux/Demux) z Nand Boot (with H/W 8/16-Bit ECC) z MMC Boot (MMC Specification 4.3 compatible including eMMC) z eSSD Boot z UART/USB Boot z Secure boot mode support - Verify Integrity of Bootloader for all boot-up devices except for UART/USB boot. - To support secure boot mode, Security key value should be written in S5PV210. If no key is written in S5PV210, It is non-secure boot mode. Otherwise It’s secure boot mode. To do that, Samsung should write security key in manufacture step. z Second boot support - When 1st boot mode fails, SD/MMC boot will be tried through SD/MMC channel 2 with 4-bit data S5PV210_IROM_APPLICATION NOTE_REV 0.3 6 Preliminary product information describe products that are in development, for which full characterization data and associated errata are not yet available. Specifications and information herein are subject to change without notice. Samsung Confidential 1.3 Advantage of iROM booting 1. Reduce BOM Cost => In iROM booting with Movinand/iNAND/MMC/eMMC Card, eSSD. System can be booted without booting rom So. There is no need other booting rom device(like nor flash) 2. Improve the Read Disturbance => In iROM booting with nand flash, S5PV210 can support 8/16-bit H/W ECC All nand boot can be supported 8-bit H/W ECC. But, 16-bit ECC is supported only one type of Nand which is 4KB 5cycle. 3. Reduce the production cost (Option) => You can program boot device memory using other boot device. => so. There is no need Gang programmer 1.4 Circuit Design Check Point ① To select iROM boot device OM pins are used. (Refer 3 Boot configuration) ② All of boot memory device of V210 have a SD/MMC second boot using MMC channel 2 ③ OneNand boot - Xm0CSn4/NFCSn2/ONANDXL_CSn0 signal should be used for boot. (BL1 code should be include checksum data in the start of BL1 binary. Refer section 2.9) ④ Nand boot - Xm0CSn2/NFCSn0 signal should be used for boot (BL1 code should be include checksum data in the start of BL1 binary. Refer section 2.9) ⑤ SD/MMC/eMMC boot – MMC Channel 0 is used for first boot. And Channel 2 is used for Second boot (BL1 code should be include checksum data in start of BL1 binary. Refer section 2.9) ⑥ UART boot – UART Channel port 2 is used for boot. S5PV210_IROM_APPLICATION NOTE_REV 0.3 7 Preliminary product information describe products that are in development, for which full characterization data and associated errata are not yet available. Specifications and information herein are subject to change without notice. Samsung Confidential 2 Operation 2.1 Operating Sequence S3C6400S5PV210 Cortex A8 iROM (BL0) (64KB) SDRAM controller Nand Controller Booting Device (MMC/OneNand/ Nand/eSSD/NOR) OS BL2 BL1 SDRAM OM = iROM Boot In case of OneNand/SD/MMC/eMMC /NAND/eSSD/NOR Internal SRAM (96KB) BL1 BL2 OneNand Controller HS-MMC Controller eSSD Controller NOR Flash Controller Figure 1. Overall boot-up diagram BL1 / BL2 : It can be variable size copied from boot device to internal SRAM area. BL1 max. size is 16KB. BL2 max. size is 80KB. ① iROM can do initial boot up : initialize system clock, device specific controller and booting device. ② iROM boot codes can load boot-loader to SRAM. The boot-loader is called BL1. then iROM verify integrity of BL1 in case of secure boot mode. ③ BL1 will be executed: BL1 will load remained boot loader which is called BL2 on the SRAM then BL1 verify integrity of BL2 in case of secure boot mode. ④ BL2 will be executed : BL2 initialize DRAM controller then load OS data to SDRAM. ⑤ Finally, jump to start address of OS. That will make good environment to use system. S5PV210_IROM_APPLICATION NOTE_REV 0.3 8 Preliminary product information describe products that are in development, for which full characterization data and associated errata are not yet available. Specifications and information herein are subject to change without notice. Samsung Confidential 2.2 iROM(BL0) boot-up sequence (Refer 2.3 V210 boot-up diagram) 1. Disable the Watch-Dog Timer 2. Initialize the instruction cache 3. Initialize the stack region (see “memory map” on chap 2.5) 4. Initialize the heap region. (see “memory map” on chap 2.5) 5. Initialize the Block Device Copy Function. (see “Device Copy Function” on chap 2.7) 6. Initialize the PLL and Set system clock. (see “clock configuration” on chap 2.11) 7. Copy the BL1 to the internal SRAM region (see “Device Copy Function” on chap 2.7) 8. Verify the checksum of BL1. If checksum fails, iROM will try the second boot up. (SD/MMC channel 2) 9. Check if it is secure-boot mode or not. If the security key value is written in S5PV210, It’s secure-boot mode. If it is secure-boot mode, verify the integrity of BL1. 10. Jump to the start address of BL1 S5PV210_IROM_APPLICATION NOTE_REV 0.3 9 Preliminary product information describe products that are in development, for which full characterization data and associated errata are not yet available. Specifications and information herein are subject to change without notice. Samsung Confidential 2.3 V210 boot-up diagram DRAM iROM Start - Disable watchdog - I Cache initialization WakeUp status == DeepIdle || DeepStop(iSRAM retention) Yes No No - Stack and variable initialization Secure Boot ? Yes From iROM WakeUp status == DeepIdle || DeepStop(iSRAM retention) Jump to BL2 Yes No No Secure Boot ? Yes Jump to BL1 Go to BL2 Go to BL1 From BL1 WakeUp status == DeepIdle || DeepStop(iSRAM retention) Jump to DRAM Yes No - DRAM initialization BL2 loading OS loading to DRAM Go to DRAM OS code start From BL2 BL1 Integrity OK ? No Yes BL2 Integrity OK ? No Yes Read eFuse value Yes N OM pin ? NAND SDMMC UART/ USB One NAND - Set Clock Devider - Set Lock Time - Start PLL(MPS value) - Set Source clock eSSD Checksum OK ? No NOR Flash BL1 BL2 iROM Go to 2nd boot Boot stop Boot stop Figure 2. V210 boot-up diagram S5PV210_IROM_APPLICATION NOTE_REV 0.3 10 Preliminary product information describe products that are in development, for which full characterization data and associated errata are not yet available. Specifications and information herein are subject to change without notice. Samsung Confidential 2.4 iROM 2nd boot-up sequence when 1st boot fail This is non-secure boot mode case. In secure boot mode, Verification integrity of BL1 should be added behind checksum in 1st & 2nd boot step. Figure 3. iROM BL1 copy flow [Caution] Samsung recommend that the 2nd, UART and USB boot options should be used for only debugging. S5PV210_IROM_APPLICATION NOTE_REV 0.3 11 Preliminary product information describe products that are in development, for which full characterization data and associated errata are not yet available. Specifications and information herein are subject to change without notice. Samsung Confidential 2.4.1 UART boot mode The S5PV210 iROM supports the UART download function. UART download is always checked by sending flag bit to DNW without regard to boot device selection. There is no selection signal for UART download. In order to avoid the UART timeout error, user should set the DNW configuration earlier than SMDK power on. Namely, when the BL1 code is selected and download process is started, the iROM should be started. Figure 4. DNW usage for iROM uart boot In order to set OM pins for uart boot, refer chapter 3 Boot configuration. S5PV210_IROM_APPLICATION NOTE_REV 0.3 12 Preliminary product information describe products that are in development, for which full characterization data and associated errata are not yet available. Specifications and information herein are subject to change without notice. Samsung Confidential 2.4.2 USB boot mode The S5PV210 iROM supports the USB download function. If UART time-out occur, iROM try to USB boot mode. In order to avoid the USB negotiation time-out error, user should connect usb-cable between target board and PC in advance. If USB connection is OK, user can download BL1 image through USB like figure 5 – 7. Figure 5. USB connection success Figure 6. USB download address setting Figure 7. Selection menu USB download As BL1 doesn’t need header information through UART/USB boot mode, BL1’s code base address is 0xd002_0000. In other cases except UART/USB boot mode, BL1 should have header information and It’s code base address is 0xd0020010. (refer chapter 2.9) S5PV210_IROM_APPLICATION NOTE_REV 0.3 13 Preliminary product information describe products that are in development, for which full characterization data and associated errata are not yet available. Specifications and information herein are subject to change without notice. Samsung Confidential 2.5 Memory Map Table1. Memory Map Internal ROM
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