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OBJECTIVE DEVICE SPECIFICATION This D evice Specification con tains data for p roduct developm ent. Ph ilips Sem iconductors reserves the righ t to change the specification in any m anner w ithout notice. TDA8932 2x15W class D Power Amplifier Confidential INTEGRATED CIRCUITS Philips Semiconductors Objective Device Specification Date: Sept 13, 2005 Version: 1.7 Previous date: July 7, 2005 Philips Semiconductors Objective Device Specification Confidential 2 × 10..25 W class-D amplifier TDA8932 September 2005, version 1.7 3 Change history 22-sep-04 Initial version 21-oct-04 Updated after feedback design team 17-nov-04 Redefinition of TDA8932: 1xBTL or 2xSE 1.0 1.1 1.2 1.3 24-nov-04 Updated after feedback design team 13-Dec-04 Updated after feedback customer 8-April-05 Updated with new pinning 7-July-05 Updated with test results and pin configuration 13-Sept-05 General update 1.4 1.5 1.6 1.7 Philips Semiconductors Objective Device Specification Confidential 2 × 10..25 W class-D amplifier TDA8932 September 2005, version 1.7 4 CONTENTS CONTENTS 4 1 FEATURES 7 2 APPLICATIONS 7 3 GENERAL DESCRIPTION 7 4 QUICK REFERENCE DATA 8 5 ORDERING INFORMATION 8 6 BLOCKDIAGRAM 9 7 PINNING INFORMATION 10 7.1 Pinning 10 7.2 Pin description 11 8 FUNCTIONAL DESCRIPTION 12 8.1 General 12 8.2 Mode selection / interfacing 12 8.3 Pulse width modulation frequency 13 8.4 Protections 13 8.4.1 Thermal foldback 13 8.4.2 Over temperature protection (OTP) 13 8.4.3 Over current protection (OCP) 14 8.4.4 Window protection (WP) 14 8.4.5 Supply voltage protections 15 8.5 Diagnostic Output 16 8.6 Differential inputs 16 8.7 Half supply voltage output 17 9 INTERNAL CIRCUITRY 18 Philips Semiconductors Objective Device Specification Confidential 2 × 10..25 W class-D amplifier TDA8932 September 2005, version 1.7 5 10 LIMITING VALUES 25 11 THERMAL CHARACTERISTICS 25 12 QUALITY SPECIFICATION 25 13 STATIC CHARACTERISTICS 26 14 SWITCHING CHARACTERISTICS 28 15 DYNAMIC SE AC CHARACTERISTICS 29 16 DYNAMIC BTL AC CHARACTERISTICS 30 17 APPLICATION INFORMATION 32 17.1 Thermal behaviour (PCB considerations) 32 17.2 Thermal foldback 32 17.3 Output Power estimation 33 17.4 External clock 33 17.5 Pumping effects 35 17.6 Gain setting 36 17.7 Low pass filter considerations 36 17.8 Curves measured in reference design 36 17.9 Typical application schematics 37 18 PACKAGE OUTLINE 39 19 SOLDERING 40 Philips Semiconductors Objective Device Specification Confidential 2 × 10..25 W class-D amplifier TDA8932 September 2005, version 1.7 6 LIST OF FIGURES Figure 1: Block diagram 9 Figure 2: Pin configuration 10 Figure 3: Diagnostic Output for different kind of short circuit conditions. 16 Figure 4: Input configuration for mono BTL application. 17 Figure 5: Output power stereo SE (@ THD=10%) and required Rth(j-a) versus supply voltage (Tj=125°C, dT=70°C) 31 Figure 6: Output power mono BTL application (@ THD=10%) and required Rth(j-a) versus supply voltage (Tj=125°C, dT=70°C) 31 Figure 7: Master slave concept in two chip application 34 Figure 8: Input/speaker configuration for stereo SE application for reducing pumping effects. 35 Figure 9: Input configuration for reducing gain. 36 Figure 10: Typical application diagram for 2 x SE (asymmetrical supply) 37 Figure 11: Typical application diagram for 1 x BTL (asymmetrical supply) 37 Figure 12: Typical application diagram for 2 x SE + 1 x BTL (asymmetrical supply) 38 LIST OF TABLES Table 1: Quick reference data 8 Table 2: Ordering information 8 Table 3: Pinning description 11 Table 4: Mode selection TDA8932 12 Table 5: Overview protections TDA8932 15 Table 6: Limiting values 25 Table 7: Thermal characteristics 25 Table 8: Static characteristics 26 Table 9: Switching characteristics 28 Table 10: Dynamic AC SE characteristics 29 Table 11: Dynamic AC BTL characteristics 30 Table 12: Master/Slave configuration 34 Table 13: Filter components value 36 Philips Semiconductors Objective Device Specification Confidential 2 × 10..25 W class-D amplifier TDA8932 September 2005, version 1.7 7 1 FEATURES • High efficiency • Application without heatsink using thermally enhanced small outline package • Operating voltage from 10V to 36V asymmetrical or +/-5V to +/-18V symmetrical • Thermally protected • Thermal foldback • Full short circuit proof across load and to supply lines (using advanced current protection) • Switchable internal / external oscillator (master-slave setting) • No pop noise • Low quiescent current • Low sleep current • Mono bridged tied load (full bridge) or stereo single ended (half bridge) application • Full differential inputs 2 APPLICATIONS • Television sets CRT/LCD/plasma TV/projection TV • Monitors 3 GENERAL DESCRIPTION The TDA8932 is a high efficiency class-D amplifier with low dissipation. The maximum output power is 2x25W in stereo half-bridge application (Rl=4 ohm) or 1x50W in mono full bridge application (Rl=8 ohm). Due to the high efficiency the device can be used without any external heat sink when playing music. If proper cooling via the PCB is implemented, a continuous output power of 2 x 15W is feasible. Due to the implementation of thermal foldback even for high supply voltages and/or lower load impedances the device can be operated with considerable music output power without the need for an external heat sink. The device has two full differential inputs driving four integrated power switches, combined in two independent outputs. It can be used as mono full bridge (BTL) or as stereo half bridge (SE). Philips Semiconductors Objective Device Specification Confidential 2 × 10..25 W class-D amplifier TDA8932 September 2005, version 1.7 8 4 QUICK REFERENCE DATA Table 1: Quick reference data SYMBOL PARAMETER CONDITION MIN. TYP. MAX. UNIT General; Vp=29V Vp Operating supply voltage 10 29 36 V Isleep Sleep current Vpower up < 0.8 V Vengage < 0.8 V 80 µA Ip Quiescent current Without load, snubbers, output filter 20 mA Stereo SE channel RL= 4Ω; THD = 10% Vp=22V 14 15 W Continuous-time RMS Output power per channel RL= 8Ω; THD = 10% Vp=29V 14 15 W PoutSE Peak output power (short-time) RL= 4Ω; THD = 10% Vp=29V 23 25 W Mono BTL channel RL= 8Ω; THD = 10% Vp=22V 28 30 W Continuous RMS Output power RL= 4Ω; THD = 10% Vp=12V 14 15 W PoutBTL Peak output power (short-time) RL= 8Ω; THD = 10% Vp=29V 48 50 W 5 ORDERING INFORMATION Table 2: Ordering information PACKAGE TYPE NUMBER NAME DESCRIPTION VERSION TDA8932T SO32 Plastic small outline package; 32 leads; body width 7.5 mm SOT287-1 Philips Semiconductors Objective Device Specification Confidential 2 × 10..25 W class-D amplifier TDA8932 September 2005, version 1.7 9 6 BLOCKDIAGRAM Figure 1: Block diagram Oscillator PWM Modulator CTRL Driver High Driver Low Stabi12V PWM Modulator CTRL Driver High Driver Low Manager PROTECTIONS OVP, OCP, OTP, UVP, TF, WP IN1P VDDA VSSD/HW BOOT1 BOOT2 VDDP1 VDDP2 VSSP1 VSSP2 OUT1 OUT2 STAB1 TDA8932 IN1N IN2P IN2N OSCREF DIAG VSSA OSCIO + 2 3 15 14 10 31 9 1, 16, 17, 32 22 21 25 27 28 29 20 12 8 INREF VSSA VDDA TEST CGND 7 5 6 4 POWER UP ENGAGE 11 30 HVPREF HVP1 STAB2 24 REG5V DREF 18 19 HVP2 26 23 VSSD Stabi12V VSSP VSSP VSSD 13 Mode Philips Semiconductors Objective Device Specification Confidential 2 × 10..25 W class-D amplifier TDA8932 September 2005, version 1.7 10 7 PINNING INFORMATION 7.1 Pinning Figure 2: Pin configuration 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 TDA8932 SO32 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 VSSD / HW IN1P IN1N DIAG ENGAGE POWER UP CGND VDDA VSSA OSCREF HVPREF INREF TEST IN2N IN2P VSSD / HW VSSD / HW OSCIO HVP1 VDDP1 BOOT1 OUT1 VSSP1 STAB1 STAB2 VSSP2 OUT2 BOOT2 VDDP2 HVP2 DREF VSSD / HW Philips Semiconductors Objective Device Specification Confidential 2 × 10..25 W class-D amplifier TDA8932 September 2005, version 1.7 11 7.2 Pin description Table 3: Pinning description Pin name Pin no. Description VSSD / HW 1 Negative digital supply voltage and handle wafer connection IN1P 2 Positive audio input for channel 1 IN1N 3 Negative audio input for channel 1 DIAG 4 (Open-drain) diagnostic output ENGAGE 5 Engage input; switch between mute and operating mode POWER UP 6 Power up input; switch between sleep and mute mode CGND 7 Control ground; reference for POWER UP, ENGAGE, DIAG VDDA 8 Positive analog supply voltage VSSA 9 Negative analog supply voltage OSCREF 10 Master/slave setting oscillator. Set internal oscillator frequency (only master-setting) HVPREF 11 Decoupling for internal half supply voltage reference INREF 12 Decoupling for input reference voltage TEST 13 Test signal input; for testing purpose only IN2N 14 Negative audio input for channel 2 IN2P 15 Positive audio input for channel 2 VSSD / HW 16 Negative digital supply voltage and handle wafer connection VSSD / HW 17 Negative digital supply voltage and handle wafer connection DREF 18 Decoupling internal 5V regulator for logic supply HVP2 19 Half supply voltage output for charging single-ended capacitor for channel 2 VDDP2 20 Positive power supply voltage for channel 2 BOOT2 21 Bootstrap capacitor for channel 2 OUT2 22 PWM output channel 2 VSSP2 23 Negative power supply voltage for channel 2 STAB2 24 Decoupling internal 12V regulator for the drivers channel 2 STAB1 25 Decoupling internal 12V regulator for the drivers channel 1 VSSP1 26 Negative power supply voltage for channel 1 OUT1 27 PWM output channel 1 BOOT1 28 Bootstrap capacitor for channel 1 VDDP1 29 Positive power supply voltage for channel 1 HVP1 30 Half supply voltage output for charging single-ended capacitor for channel 1 OSCIO 31 Input/output for external oscillator (slave-setting) VSSD / HW 32 Negative digital supply voltage and handle wafer connection Philips Semiconductors Objective Device Specification Confidential 2 × 10..25 W class-D amplifier TDA8932 September 2005, version 1.7 12 8 FUNCTIONAL DESCRIPTION 8.1 General The TDA8932 is a mono full bridge (BTL) or stereo half bridge (SE) audio power amplifier using class-D technology. The audio input signal is converted into a Pulse Width Modulated (PWM) signal via an analog input stage and PWM modulator. To enable the output power DMOS transistors to be driven, this digital PWM signal is applied to a control and handshake block and driver circuits for both the high side and low side. A 2nd-order low-pass filter converts the PWM signal to an analog audio signal across the loudspeakers. The TDA8932 contains two independent half bridges with full differential input stages. The loudspeakers can be connected in the following configurations: • Mono full bridge (Bridge-Tied Load, BTL) • Stereo half-bridge (Single-Ended, SE) The TDA8932 contains common circuits to both channels such as the oscillator, all reference sources, the mode functionality and a digital timing manager. The following protections are built-in: thermal fold back, temperature, current and voltage protections. 8.2 Mode selection / interfacing The TDA8932 can be switched in three operating modes via POWER UP and ENGAGE inputs: • Sleep mode; with a very low supply current • Mute mode; the amplifiers are switching idle (50% duty cycle), but the audio signal at the output is suppressed by disabling the Vl-converter input stages. In this mode the reference currents and voltages are present. The HVP capacitors have been charged to half the supply voltage (asymmetrical supply only). • Operating mode; the amplifiers are fully operational with output signal. Both pins POWER UP and ENGAGE refer to pin CGND. In the table 4 below the different modes are given as function of the voltages on the POWER UP and ENGAGE pins. Mode selection POWER UP ENGAGE Sleep Vpower up< 0.8 V X (don’t care) Mute 2 V < Vpower up < 6.5 V Note1 Vengage< 0.8 V Note1 Operating 2 V < Vpower up < 6.5 V Note1 3 V < Vengage < 6.5 V Note1 Table 4: Mode selection TDA8932 Note 1 in case of symmetrical supply conditions the voltage applied on the POWER UP and ENGAGE inputs must never exceed the supply voltage VDDx Philips Semiconductors Objective Device Specification Confidential 2 × 10..25 W class-D amplifier TDA8932 September 2005, version 1.7 13 If the transition between mute and operating mode is controlled via a time-constant, the start-up will be pop-free since the DC output offset voltage is applied gradually to the output between mute mode and operating mode. The bias current setting of the VI converters is related to the voltage on the ENGAGE pin; in mute mode the bias current setting of the VI converters is zero (VI converters disabled) and in operating mode the bias current is at maximum. The time constant required to apply the DC output offset voltage gradually between mute and operating can be generated by applying a decoupling capacitor on the ENGAGE pin. The value of the time-constant should be dimensioned for 500 ms using a capacitor of 1µF on the ENGAGE pin. 8.3 Pulse width modulation frequency The output signal of the amplifier is a PWM signal with a carrier frequency of approximately 320 kHz. Using a 2nd-order LC demodulation filter in the application results in an analog audio signal across the loudspeaker. The PWM switching frequency can be set by an external resistor Rosc connected between pin OSCREF and VSSD. The carrier frequency can be set between 300 kHz and 500 kHz. Using an external resistor of 39kΩ on the OSCREF pin, the carrier frequency is set to an optimized value of 320 kHz. If two or more TDA8932 devices are used in the same audio application, it is recommended to synchronize the switching frequency of all devices. This is described in chapter 17.4 External Clock. 8.4 Protections The following protections are included in TDA8932: • Thermal foldback (TF) • Over temperature protection (OTP) • Over current protection (OCP) • Window protection (WP) • Supply voltage protections - Under voltage protection (UVP) - Over voltage protection (OVP) - Un Balance Protection (UBP) The reaction of the device on the different fault conditions differs per protection and is described in the following sections. 8.4.1 Thermal foldback If the junction temperature Tj > 140 0C, then the gain is gradually reduced resulting in a smaller output signal and less dissipation. At Tj > 1500C the outputs are fully muted. 8.4.2 Over temperature protection (OTP) If the junction temperature Tj > 1600C, then the power stage will shut down immediately. Philips Semiconductors Objective Device Specification Confidential 2 × 10..25 W class-D amplifier TDA8932 September 2005, version 1.7 14 8.4.3 Over current protection (OCP) When the loudspeaker terminals are short-circuited or if one of the demodulated outputs of the amplifier is short-circuited to one of the supply lines, this will be detected by the over current protection (OCP). If the output current exceeds the maximum output current of 4A, this current will be limited by the amplifier to 4A while the amplifier outputs remain switching (the amplifier is NOT shut-down completely). The amplifier can distinguish between an impedance drop of the loudspeaker and low-ohmic short across the load or to one of the supply lines. This impedance threshold (Zth) depends on the supply voltage used. When a short is made across the load causing the impedance to drop below the threshold level ( 40V is caused by other/external causes than the TDA8932 will shut down, but the device can still be damaged since the supply voltage will remain > 40V in this case. The OVP protection is not a supply clamp. An additional Un Balance Protection (UBP) circuit compares the positive analog (VDDA) and the negative analog (VSSA) supply voltage and is triggered if the voltage difference between them exceeds a certain level. This level depends on the sum of both supply voltages. An expression for the unbalance threshold level is as follows: Vth(ubp) ≈ 0.25 x (VDDA + V