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Technical Reference Manual TMDXEVM6657L SPRUHG7 - Revised May 2012 TMDXEVM6657LE Page 1 / 89 TMDXEVM6657L / TMDXEVM6657LE Technical Reference Manual Version 0.1 Literature Number: SPRUHG7 Revised May 2012 Document Copyright Publication Title: C6657 Lite EVM Technical Reference Manual All Rights Reserved. Reproduction, adaptation, or translation without prior written permission is prohibited, except as allowed under the copyright laws. Technical Reference Manual TMDXEVM6657L SPRUHG7 - Revised May 2012 TMDXEVM6657LE Page 2 / 89 EVALUATION BOARD/KIT/MODULE (EVM) WARNINGS, RESTRICTIONS AND DISCLAIMER Not for Diagnostic Use: For Feasibility Evaluation Only in Laboratory/Development Environments The EVM may not be used for diagnostic purposes. This EVM is intended solely for evaluation and development purposes. It is not intended for use and may not be used as all or part of an end equipment product. This EVM should be used solely by qualified engineers and technicians who are familiar with the risks associated with handling electrical and mechanical components, systems and subsystems. Your Obligations and Responsibilities Please consult the EVM documentation, including but not limited to any user guides, set up guides or getting started guides and other warnings prior to using the EVM. Any use of the EVM outside of the specified operating range may cause danger to the users and/or produce unintended results, inaccurate operation, and permanent damage to the EVM and associated electronics. You acknowledge and agree that: You are responsible for compliance with all applicable Federal, State and local regulatory requirements (including but not limited to Food and Drug Administration regulations, UL, CSA, VDE, CE, RoHS and WEEE,) that relate to your use (and that of your employees, contractors or designees) of the EVM for evaluation, testing and other purposes. You are responsible for the safety of you and your employees and contractors when using or handling the EVM. Further, you are responsible for ensuring that any contacts or interfaces between the EVM and any human body are designed to be safe and to avoid the risk of electrical shock. You will defend, indemnify and hold TI, its licensors and their representatives harmless from and against any and all claims, damages, losses, expenses, costs and liabilities (collectively, “Claims”) arising out of or in connection with any use of the EVM that is not in accordance with the terms of this agreement. This obligation shall apply whether Claims arise under the law of tort or contract or any other legal theory, and even if the EVM fails to perform as described or expected. Warning The EVM board may get very hot during use. Specifically, the DSP, its heat sink and power supply circuits all heat up during operation. This will not harm the EVM. Use care when touching the unit when operating or allow it to cool after use before handling. If unit is operated in an environment that limits free air flow, a fan may be needed. Technical Reference Manual TMDXEVM6657L SPRUHG7 - Revised May 2012 TMDXEVM6657LE Page 3 / 89 Preface About this Document This document is a Technical Reference Manual for the TMS320C6657 Evaluation Module (C6657 Lite EVM) designed and developed by eInfochips Limited for Texas Instruments, Inc. Notational Conventions This document uses the following conventions: Program listings, program examples, and interactive displays are shown in a mono-spaced font. Examples use bold for emphasis, and interactive displays use bold to distinguish commands that you enter from items that the system displays (such as prompts, command output, error messages, etc.). Square brackets ( [ and ] ) identify an optional parameter. If you use an optional parameter, you specify the information within the brackets. Unless the square brackets are in a bold typeface, do not enter the brackets themselves. Underlined, italicized non-bold text in a command is used to mark place holder text that should be replaced by the appropriate value for the user‟s configuration. Technical Reference Manual TMDXEVM6657L SPRUHG7 - Revised May 2012 TMDXEVM6657LE Page 4 / 89 Trademarks The Texas Instruments logo and Texas Instruments are registered trademarks of Texas Instruments. Trademarks of Texas Instruments include: TI, XDS, Code Composer, Code Composer Studio, Probe Point, Code Explorer, DSP/BIOS, RTDX, Online DSP Lab, TMS320, TMS320C54x, TMS320C55x, TMS320C62x, TMS320C64x, TMS320C67x, TMS320C5000, and TMS320C6000. MS-DOS, Windows, Windows XP, and Windows NT are trademarks of Microsoft Corporation. UNIX is a registered trademark of The Open Group in the United States and other countries. MicroTCA and AMC (or AdvancedMC) are trademarks of PICMG. All other brand, product names, and service names are trademarks or registered trademarks of their respective companies or organizations. Technical Reference Manual TMDXEVM6657L SPRUHG7 - Revised May 2012 TMDXEVM6657LE Page 5 / 89 Document Revision History Release Chapter Description of Change 0.1 All Initial Draft Acronyms Acronym Description AMC or AdvancedMC Advanced Mezzanine Card CCS Code Composer Studio DDR3 Double Data Rate 3 Interface DIP Dual-In-Line Package DSP Digital Signal Processor DTE Data Terminal Equipment EEPROM Electrically Erasable Programmable Read Only Memory EMAC Ethernet Media Access Controller EMIF External Memory Interface EVM Evaluation Module FPGA Field Programmable Gate Array I2C Inter Integrated Circuit IPMB Intelligent Platform Management Bus IPMI Intelligent Platform Management Interface JTAG Joint Test Action Group LED Light Emitting Diode McBSP Multi Channel Buffered Serial Port MCH MicroTCA Carrier Hub MTCA or MicroTCA Micro Telecommunication Computing Architecture MMC Module Management Controller PCIe PCI Express PICMG® PCI Industrial Computer Manufacturers Group RFU Reserved for Future Use SDRAM Synchronous Dynamic Random Access Memory SERDES Serializer-Deserializer SGMII Serial Gigabit Media Independent Interface SRIO Serial RapidIO UART Universal Asynchronous Receiver/Transmitter USB Universal Serial Bus XDS560v2 Texas Instruments’ System Trace Emulator Technical Reference Manual TMDXEVM6657L SPRUHG7 - Revised May 2012 TMDXEVM6657LE Page 6 / 89 Table of Contents 1. OVERVIEW ............................................................................................................................................................ 11 1.1 KEY FEATURES .............................................................................................................................................. 11 1.2 FUNCTIONAL OVERVIEW.............................................................................................................................. 12 1.3 BASIC OPERATION ........................................................................................................................................ 14 1.4 BOOT MODE AND BOOT CONFIGURATION SWITCH SETTING............................................................. 15 1.5 POWER SUPPLY ............................................................................................................................................. 16 2. INTRODUCTION TO THE C6657 LITE EVM BOARD ...................................................................................... 17 2.1 MEMORY MAP ................................................................................................................................................. 17 2.2 EVM BOOT MODE AND BOOT CONFIGURATION SWITCH SETTINGS ................................................. 22 2.3 BOARD REVISION ID ...................................................................................................................................... 23 2.4 JTAG - EMULATION OVERVIEW .................................................................................................................. 24 2.4.1 JTAG – TMDXEVM6657L ............................................................................................................................... 24 2.4.2 JTAG – TMDXEVM6657LE ............................................................................................................................. 25 2.4.2.1. XDS560V2 MEZZANINE EMULATOR BOOTING .................................................................................... 26 2.5 CLOCK DOMAINS ........................................................................................................................................... 27 2.6 I2C BOOT EEPROM / SPI NOR FLASH ........................................................................................................ 28 2.7 FPGA ................................................................................................................................................................. 29 2.8 ETHERNET SWITCH ....................................................................................................................................... 30 2.9 SERIAL RAPIDIO (SRIO) INTERFACE ......................................................................................................... 31 2.10 DDR3 EXTERNAL MEMORY INTERFACE ................................................................................................... 31 2.11 16-BIT ASYNCHRONOUS EXTERNAL MEMORY INTERFACE (EMIF-16) & UPP ................................. 32 2.12 HYPERLINK INTERFACE ............................................................................................................................... 33 2.13 PCIE INTERFACE ............................................................................................................................................ 33 2.14 MCBSP INTERFACE ....................................................................................................................................... 34 2.15 UART INTERFACE .......................................................................................................................................... 35 2.16 MODULE MANAGEMENT CONTROLLER (MMC) FOR IPMI ..................................................................... 36 2.17 EXPANSION HEADER .................................................................................................................................... 36 3. C6657 LITE EVM BOARD PHYSICAL SPECIFICATIONS .............................................................................. 37 3.1 BOARD LAYOUT ............................................................................................................................................. 37 3.2 CONNECTOR INDEX ....................................................................................................................................... 38 3.2.1 560V2_PWR1, XDS560V2 MEZZANINE POWER CONNECTOR ............................................................... 39 3.2.2 AMC1, AMC EDGE CONNECTOR ................................................................................................................. 39 Technical Reference Manual TMDXEVM6657L SPRUHG7 - Revised May 2012 TMDXEVM6657LE Page 7 / 89 3.2.3 COM1, UART 3-PIN CONNECTOR ................................................................................................................ 41 3.2.4 COM_SEL1, UART ROUTE SELECT CONNECTOR ................................................................................... 41 3.2.5 DC_IN1, DC POWER INPUT JACK CONNECTOR ...................................................................................... 42 3.2.6 EMU1, TI 60 PIN DSP JTAG CONNECTOR.................................................................................................. 42 3.2.7 HYPERLINK1, HYPERLINK CONNECTOR .................................................................................................. 43 3.2.8 J4 AND J5, EMULATION PATH SELECTION CONNECTOR ..................................................................... 44 3.2.9 LAN1, ETHERNET CONNECTOR .................................................................................................................. 44 3.2.10 PMBUS1, PMBUS CONNECTOR FOR SMART REFLEX CONTROL ................................................... 45 3.2.11 TAP_FPGA1, FPGA JTAG CONNECTOR (FOR FACTORY USE ONLY) ............................................ 45 3.2.12 SBW_MMC1, MSP430 SPYBIWIRE CONNECTOR (FOR FACTORY USE ONLY) ............................. 45 3.2.13 TEST_PH1, EXPANSION HEADER (EMIF-16, SPI, GPIO, TIMER I/O, I2C, MCBSP AND UART) .... 46 3.2.14 USB1, MINI USB CONNECTOR ................................................................................................................ 47 3.3 DIP AND PUSHBUTTON SWITCHES ............................................................................................................ 48 3.3.1 RST_COLD1, COLD RESET ........................................................................................................................... 48 3.3.2 RST_FULL1, FULL RESET ............................................................................................................................. 48 3.3.3 RST_WARM1, WARM RESET ........................................................................................................................ 48 3.3.4 SW3, DSP CONFIGURATION ........................................................................................................................ 48 3.3.5 SW4, DSP BOOT MODE ................................................................................................................................. 49 3.4 TEST POINTS ................................................................................................................................................... 50 3.5 SYSTEM LEDS ................................................................................................................................................. 51 4. C6657 LITE EVM SYSTEM POWER REQUIREMENTS ................................................................................... 54 4.1 POWER REQUIREMENTS .............................................................................................................................. 54 4.2 POWER SUPPLY DISTRIBUTION ................................................................................................................. 56 4.2.1 CVDD AND VCC1V0 DESIGN ........................................................................................................................ 57 4.2.2 VCC3V3_AUX AND VCC1V5 DESIGN .......................................................................................................... 58 4.2.3 VCC5 DESIGN .................................................................................................................................................. 59 4.3 POWER SUPPLY BOOT SEQUENCE ........................................................................................................... 59 5. C6657 LITE EVM FPGA FUNCTIONAL DESCRIPTION .................................................................................. 63 5.1 FPGA OVERVIEW ............................................................................................................................................ 63 5.2 FPGA SIGNALS DESCRIPTION .................................................................................................................... 63 5.3 SEQUENCE OF OPERATION ........................................................................................................................ 68 5.3.1 POWER-ON SEQUENCE ................................................................................................................................ 69 5.3.2 POWER OFF SEQUENCE .............................................................................................................................. 69 5.3.3 BOOT CONFIGURATION TIMING ................................................................................................................. 70 Technical Reference Manual TMDXEVM6657L SPRUHG7 - Revised May 2012 TMDXEVM6657LE Page 8 / 89 5.3.4 BOOT CONFIGURATION FORCED IN I2C BOOT ....................................................................................... 71 5.4 RESET DEFINITION ........................................................................................................................................ 71 5.4.1 RESET BEHAVIOR .......................................................................................................................................... 71 5.4.2 RESET SWITCHES AND TRIGGERS ............................................................................................................ 71 5.5 SPI PROTOCOL ............................................................................................................................................... 72 5.5.1 FPGA-DSP SPI PROTOCOL .......................................................................................................................... 72 5.5.2 FPGA- CDCE62005 (CLOCK GENERATOR) SPI PROTOCOL .................................................................. 74 5.6 FPGA CONFIGURATION REGISTERS ......................................................................................................... 75 5.6.1 FPGA CONFIGURATION REGISTERS SUMMARY .................................................................................... 75 5.6.2 FPGA CONFIGURATION REGISTERS DESCRIPTIONS ............................................................................ 76 Technical Reference Manual TMDXEVM6657L SPRUHG7 - Revised May 2012 TMDXEVM6657LE Page 9 / 89 List of Figures FIGURE 1.1: BLOCK DIAGRAM OF TMDXEVM6657L ............................................................................................................ 12 FIGURE 1.2: BLOCK DIAGRAM OF TMDXEVM6657LE .......................................................................................................... 13 FIGURE 1.3: TMDXEVM6657L .............................................................................................................................................. 14 FIGURE 1.4: TMDXEVM6657LE ............................................................................................................................................ 15 FIGURE 2.1: EVM BOARD REVISION ....................................................................................................................................... 23 FIGURE 2.2: TMDXEVM6657L JTAG EMULATION ............................................................................................................... 24 FIGURE 2.3: TMDXEVM6657LE JTAG EMULATION ............................................................................................................. 25 FIGU