hdmi测试

hdmi测试 3.7 DDC/CEC Capacitance and Voltage 3.7.1 Test Setup Topology 3.7.2 Test Procedure 1. Verify that the TPA is disconnected from the DUT. 2. Connect the Hioki DC-Bias Unit in an inverted configuration: 2.1) Supply the DC bias voltage in the direction opposite from a typical configuration. 2.2) As shown in setup above, probe polarity should also be connected in an inverteddirection (i.e. GND line is connected to H port of the probe, and Signal line to L port).Note that, for accurate measurement, the earth line (3rd pin) of the AC plug should bedisconnected for both the HIOKI-3532-50 and DC-power supply. 3. Turn on power to the DUT. 4. Connect the HPD signal to the DDC/CEC Ground signal on the TPA. 5. Connect the DDC/CEC Ground signal to the frame ground of the TPA. 6. Verify that the TPA is disconnected from the DUT. 7. Starting with a Hioki CV setting of 1.2V, adjust the CV setting until the test signal delivered to the TPA has: 6.1) DC Bias voltage = 2.5V 6.2) AC voltage = 3.5V peak-to-peak 6.3) Frequency = 100 kHz 8. Measure the capacitance of the SDA line. This is the inherent test equipment capacitance, C1SDA. 9. Measure the capacitance of the SCL line: C1SCL. 10. Attach the TPA to the DUT. 11. Measure the capacitance of the SDA line. This is the total capacitance, C2SDA. 12. Calculate the DUT capacitance, CDUT_ SDA = C2 SDA – C1 SDA. 13. If CDUT_ SDA > 50pF, then FAIL. 14. Disconnect the TPA from the DUT. 15. Measure the inherent TE capacitance of the SCL line, C1SCL. 16. Attach the TPA to the DUT. 17. Measure the total capacitance of the SCL line, C2SCL. 18. CDUT_ SCL = C2 SCL – C1 SCL. 19. If CDUT_SCL > 50pF, then FAIL. 20. Disconnect the TPA from the DUT. 21. Starting with a CV value of 0.9V, adjust the LCR meter CV setting until the test signal delivered to the TPA has: 20.1) DC Bias voltage = 1.65V 20.2) AC voltage = 2.5V peak-to-peak 20.3) Frequency = 100 kHz 22. Measure the capacitance of the CEC pin to measure the intrinsic capacitance of the TPA, C1CEC. 23. Turn off power to the DUT. 24. Connect the TPA to the DUT. 25. Measure the total capacitance of the CEC line, C2OFF_CEC. 26. CDUT_OFF_CEC = C2OFF_CEC – C1CEC. 27. If CDUT_OFF_CEC > 150pF, then FAIL. 28. Turn on power to the DUT. 29. Repeat the C2 measurement and the CDUT_ON_CEC calculation for the CEC pin. 30. If CDUT_ON_CEC > 150pF, then FAIL. 31. Disconnect the LCR meter from the TPA, leaving the TPA connected to the DUT. 32. Verify that the HPD signal is connected to the DDC/CEC Ground signal on the TPA. 33. Turn on power to the DUT. 34. Attach the oscilloscope to the DUT and measure the voltage (VSDA) of the SDA line when it is not being driven low. 35. If VSDA < 4.5V or VSDA > 5.5V then FAIL. 36. Measure the voltage (VSCL) of the SCL line when not being driven low. 37. If VSCL < 4.5V or VSCL > 5.5V then FAIL. 38. Measure the voltage (VCEC) of the CEC line when not being driven low. 39. If VCEC > 0.6V and (VCEC < 2.5V or VCEC > 3.6V) then FAIL. 3.7.3 Test Result DUT power on: Test status Item Criteria Measurement (PASS/FAIL/NT) ?50 pF DDC Data Capacitance 17.24pF PASS ?50 pF DDC Clock Capacitance 19.12pF PASS ?150 pF CEC Capacitance 1.71pF PASS PASS 4.5V? V? 5.3V DDC Data V 5.106V SDA SDA PASS 4.5V? V? 5.3V DDC Clock V 5.106V SCL SCL V < 0.6V? CEC CEC V0V PASS CEC 2.5V? V? 3.6V CEC DUT power off: Test status Item Criteria Measurement (PASS/FAIL/NT) ?50 pF DDC Data Capacitance 19.27pF PASS ?50 pF DDC Clock Capacitance 19.56pF PASS ?150 pF CEC Capacitance 29.71pF PASS 3.8 CEC Line Degradation Test 3.8.1 Test Setup Topology 3.8.2 Test Procedure 1. Connect TPA to DUT. 2. Set DC Power Supply to 3.3V. 3. Connect the CEC line to DDC/CEC Ground on the TPA-P via a 1MΩ ?5% resistor. 4. Set Multi-Meter to voltage measurement and connect between CEC pin and DDC/CEC Ground on TPA. 5. Power on DUT. 6. Measure voltage with Multi-Meter, record as VCEC1. 7. if (VCEC1 is in the range 0V to 0.1V) or (VCEC1 is in the range 2.88V to 3.63V) then continue else then FAIL. 8. Disconnect the CEC line from DDC/CEC Ground. 9. Connect the CEC line on TPA to DC Power Supply (3.3V) via the 27kΩ ?5% resistor. 10. Measure voltage; if voltage is not 3.3V ?10% then ? FAIL. 11. Connect the CEC line on the TPA to DDC/CEC Ground on TPA via 1kΩ ?5% load resistor (as well as the previously connected 3.3V via 27kΩ). 12. Measure voltage, record as VCEC2. 13. If VCEC1 in the range 0V to 0.1V and VCEC2 is not in the range 0.12V ?12% then? FAIL. 14. If VCEC1 >= 2.88V and <= 3.63V and VCEC2 is not in the range 0.196V to 0.274V then ? FAIL. 15. Repeat tests with DUT in power off state. 16. If standby power mode exists on DUT, repeat test in that state. 17. Remove power (mains) from DUT. 18. Disconnect CEC line from both resistors going to DDC/CEC Ground and 3.3V. 19. Set DC Power Supply to 3.63V. 20. Connect the CEC line on the TPA input connector to one end of 27kΩ resistor. 21. Set Multi-Meter to current measurement and connect between free end of 27kΩ resistor and DC power supply. 22. From multi-meter, record leakage current. If measured current > 1.8μA then ? FAIL. 3.8.3 Test Result DUT power on: Test status Item Criteria Measurement (PASS/FAIL/NT) < 0.1V? 0V< VCEC1 V PASS CEC1 2.88V< V< 3.63V CEC1 3.3V?10% V(27KΩ to 3.3V) PASS 0.12V ?12%? V(27KΩ to 3.3V) PASS CEC2 0.196V< V< 0.274V CEC1 DUT power off: Test status Item Criteria Measurement (PASS/FAIL/NT) V 0V< V< 0.1V PASS CEC1CEC1 3.3V?10% V(27KΩ to 3.3V) PASS 0.12V?12% V(27KΩ to 3.3V) PASS CEC2