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hard disk control

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hard disk control 7 Mechatronics 7.1 Modelling of Mechatronic Systems The aim of this chapter is to apply the foundations obtained in previous chapters to actual mechatronic systems. The interaction between the domains is particularly significant here because the interfaces contribu...
hard disk control
7 Mechatronics 7.1 Modelling of Mechatronic Systems The aim of this chapter is to apply the foundations obtained in previous chapters to actual mechatronic systems. The interaction between the domains is particularly significant here because the interfaces contribute significantly to system behaviour. In particular, we are aiming too low if we only consider electronics or mechanics independently of each other. The problem of the joint simulation of electronics and mechanics must be solved, which again throws up a whole range of problems: In the case of mechatronics, the time constants of mechanics and electronics often differ by orders of magnitude. For macromechanics we can expect oscillations of a few (tens of) hertz. In electronics the figure lies four to six orders of magnitude higher. So we could assume that the dynamic interaction between electronics and mechanics can be disregarded. The opposite is true. For example, a wide range of control algorithms are performed on embedded controllers. Their running time again lies in the millisecond range, so that dynamic feedback between electronics and mechanics very definitely plays a role. This requires the dynamic simulation of the entire system in order to be able to track cyclical dependencies, including those that cross domain boundaries. Another reason for the importance of this is the fact that domain boundaries often also represent the interfaces between design teams working in parallel. For the field of mechanics, precise models that are compatible with an electron- ics simulator must be prepared. During the following chapter we will exclusively consider multibody mechanics, which is generally sufficient for system consider- ations in the field of macro mechatronics. Even with this limitation the vectorial nature of mechanics is not easy to represent on a circuit simulator. An efficient conversion is of crucial importance for the field of software in particular. Millions of machine instructions are performed in a single second of real time. On the other hand, it is necessary to precisely determine the timing of the functions implemented using software, which requires a precise synchronisation between software and electronics. This is indispensable in order to correctly reflect the dynamics between software, electronics and mechanics. Mechatronic Systems Georg Pelz  2003 John Wiley & Sons, Ltd ISBN: 0-470-84979-7 152 7 MECHATRONICS 4.0 2.0(A ) (A ) (A ) 0.0 4.0 2.0 0.0 4.0 2.0 0.0 0.0 0.1 0.2 0.3 0.4 0.5 t(s) 0.6 0.7 0.8 0.9 1.0 Type 1 Type 2 Type 3 CR123A AlMn NiCd T = − 20 C T = − 20 C T = 20 C T = − 20 C T = 20 C T = 20 C Figure 7.11 Armature currents for various battery/rechargable battery types and temperatures 7.4.4 Simulation For the simulation shown in the following, see Figure 7.11, a motor was selected and operated using extremely varied batteries and accumulators at +20◦C and −20◦C. All the curves show the armature current, the integral of which is a mea- sure for the charge consumption. When the armature current is zero, the winding operation is complete. Thus we can also use these diagrams to check adherence to the time specification for the winding operation. Individually, lithium batteries (CR123A), AlMn batteries and NiCd rechargeable batteries were used. It is strik- ing that the NiCd accumulators are considerably less problematic, which is due to their overall lower internal resistance. Furthermore, we see that in some cases the lithium batteries are no longer capable of adhering to the specification of 850ms for a winding operation at low temperatures. 7.5 Demonstrator 4: Disk Drive 7.5.1 Introduction The section gives an overview of electronics and firmware development using The Virtual Disk Drive, which is a generic model of a disk drive, formulated in hardware description language, see also [78], [320], [321]. The Virtual Disk Drive covers digital, analogue and power electronics, firmware and mechanics. Thus it 7.5 DEMONSTRATOR 4: DISK DRIVE 153 even allows us to assess functionality spread over all these domains. One example of this is track following and track seeking for the read/write-head. Moreover, this section details the resulting electronics design methodology. For instance, it will be shown how key system properties, e.g. seek time, can be deter- mined by means of the mixed simulation of mechanics, electronics and firmware. In addition, the same simulation environment is used to realistically verify analogue and digital circuitry as well as firmware. 7.5.2 The disk drive The following section details some typical configurations of a disk drive and dis- cusses how these translate into requirements for the associated electronics, see also Figure 7.12. A drive normally contains up to five rotating disks. This disk (stack of disks) is driven by the spindle motor, which is a brushless DC motor. The rotational velocity varies between 4200 and 15 000 revolutions per minute.2 The RW-head flies on an air cushion 10–50 nm above the disk surface. It is supported by the load-beam, which can be moved about its pivot by the so-called voice coil motor. This consists of a coil that lies in a fixed magnetic field provided by permanent magnets, see Figure 7.13. Any current through the coil results in a torque on the load-beam and thus a circular motion of the RW-head. + + + + RW-Head Disk(s) Loadbeam Spindle motor Voice coil motor Pivot Figure 7.12 Hard disk drive overview 2 Higher as well as lower rotational velocities are chosen at times, e.g. to cope with low latency or low noise requirements. 154 7 MECHATRONICS Pivot RW-Head Coil Magnetic field Figure 7.13 Voice coil motor The data on the disk is organized in circular tracks. The outermost track may be located at a radius of 1.8 inch for a typical 3.5 inch form factor drive.3 This means that the maximum length of a track is 11.3 inches, which gives rise to a linear speed of about 1880 inch/s for a 10 000 rev/min drive. This, together with a bit density within a track of 400Kbit/inch, for example, in turn leads to a peak data rate of 750Mbit/s. Interestingly enough, 1880 inch/s— in terms of the velocity of a car— is far beyond any speed limit, while bits of the length of about 60 nm are reliably read. The track density of drives currently under design is in the range of 30 000–100 000 tracks per inch. Together with bit densities of 300–500Kbit/inch this leads to surface densities of 9–50Gbit/inch2. Given the current track densities, the track pitch is in the range of 250 nm (100 000 tracks/inch) to 850 nm (30 000 tracks/inch). Controlling the head position to a precision of 10% of the track width, to make sure that most of the track width adds to the signal and to keep noise at bay, results in a required precision of 25 nm–85 nm when controlling the track following. 7.5.3 Circuit development for disk drives Designing circuits for disk drives is currently an ASIC4 business with a low number of customers, i.e. the disk drive companies, and high volumes. For instance, 223 million disk drives were shipped in the year 2000. This is still the case even though several attempts to create ASSPs5 have been made in the past and are underway at the moment. The electronics of a disk drive— together with the related firmware—can be partitioned into a few functions: • Servo control The servo control detects the current position of the head using so-called servo marks which are embedded into the tracks. Several hundreds of these marks are available throughout a full rotation of the disk. On the basis of this information the voice coil motor is controlled to allow for track following and seeking. 3 Note that none of the dimensions of a 3.5 inch drive is actually 3.5 inch. The disk’s form factor is just the same as for a 3.5 inch floppy drive. 4 Application specific integrated circuit. 5 Application specific standard product. 7.5 DEMONSTRATOR 4: DISK DRIVE 155 • Spindle control The spindle control detects the current rotational velocity, e.g. by means of back-emf6 evaluation of the undriven phase of the brushless DC spindle motor. This information is taken into account in the control of the rotational veloc- ity of spindle and disk stack. Spindle control also includes the (electronically controlled) commutation of the motor’s phases and the implementation of sophisticated start-up algorithms. The problem with the start-up is that the brushless DC motor has no preferred rotation direction. However, if the disk rotates in the wrong direction the read/write-head might easily damage the disk’s surface. So a great deal of work is underway into the sequence of the spindle motor start-up commutation to reliably provide for the correct rota- tion direction. • Signal processing The signal processing function controls the data as it is written to and read from the disk. It encodes the data to be stored, and writes it to the read/write- head. When reading from the read/write-head, the data is pre-amplified and retrieved, using sophisticated techniques like the partial response maximum likelihood method. To allow for even more density— i.e. an even worse signal to noise ratio— the data on the disk contains additional information which is used for error correction. This often is based on Reed/Solomon techniques. • Buffer management Data written to or read from the disk has to be fed through a buffer of substantial size to reliably rule out over- and under-runs. For this, DRAM of typically 0.5–2 MBytes is employed, which may be stand-alone or embedded in a system on a chip. In addition, a buffer manager is necessary that offers caching facilities and manages access to the memory for data buffering and other purposes, e.g. program execution from the DRAM. • Host interface The host interface implements the communication with the host computer. It interprets the IDE or SCSI commands given and arranges their completion. In the design process these functions are mapped to an architecture. The list of functions and the overall architecture is more or less generic and is the same for most of the disk drive designs, see Figure 7.14. The overall architecture of the disk electronics is based on five circuits, see Figure 7.14: motion-control, hard disk controller (HDC), RW-channel (stand-alone or embedded), pre-amp and DRAM (stand-alone or embedded). The HDC provides the micro-controller and also looks after the host interface and— together with the DRAM—the buffer management. The RW-Channel— together with the pre-amp— incorporates the signal processing function. Finally motion-control looks after the analogue and power side of servo 6 Electro-motive force. 156 7 MECHATRONICS Spindle control Host interface Buffer manager Signal processing Servo control Custom power Custom digital Memory Cores & firmware Custom analog Motion- control Harddisk- controller Channel Pre-amp DRAM Function ImplementationCircuits Figure 7.14 Typical mapping of functions to circuits and implementations and spindle control. When it comes to the detailed architecture, a couple of trade- offs, e.g. performance (hardware) vs. flexibility (software), lead to a vast number of variants in use. For instance, for the control-related parts of the disk function, one may choose to use a standard micro-controller with some DSP-capabilities, e.g. multiply-accumulate operation. If performance plays a more important role, a DSP core may be added. Moreover, in some cases it makes sense to introduce application specific logic for the control tasks. For the implementation, the classical options are available, i.e. processor cores with firmware, custom digital circuitry, custom analogue circuitry, custom power circuitry and memory. Figure 7.14 shows the mapping of the functions into their implementation. Under the system-on-chip regime, the above five circuits may be arranged on three to five chips. The pre-amp will probably remain in the form of a stand-alone device in the future, since it is located on the load-beam, i.e. the shortest possible distance from the read/write-head. All other circuits are on the printed circuit board which is on the reverse of the disk drive. The motion-control circuit contains a couple of power devices for which integration into the digital standard process would not be cost-effective. Thus it probably will not be embedded into current or future SoCs.7 On the other hand, the hard disk controller may be combined with an embedded channel and embedded DRAM on a chip to reduce package cost, save board space and increase the electrical performance. Figure 7.15 shows a couple of alternatives for the mapping of the five circuits to chips. 7 System on a chip. 7.5 DEMONSTRATOR 4: DISK DRIVE 157 Motion- control Motion- control Motion- control Motion- control HDC, e-DRAM, e-channel HDC, e-channel DRAM HDC DRAM HDC, e-DRAM Channel Channel (1) (2) (3) (4) Pre- amp Pre- amp Pre- amp Pre- amp Figure 7.15 Several alternatives for the mapping of circuits to chips 7.5.4 The virtual disk drive The design of circuits for disk drives has to take into account analogue–digital, hardware–software and electronics–mechanics interfaces at the same time. The Virtual Disk Drive was created to cope with that. It provides simulation models for all the parts of a disk drive and is meant to support an electronics product for a disk drive throughout its entire life-cycle. • In the concept phase, high-level models form an executable specification which can be validated by simulation. This model also serves as a framework for design space exploration and even allows for early firmware development. • In the design phase, the virtual prototype creates a general test bench. In this high-level system model, it is possible to ‘zoom’ into the components being designed, replacing high-level component models by their implementations. This may be done for any part of the system, whereas the system modelling has to be carried out just once. Moreover, this reveals information on the real- life system behaviour rather than more or less synthetic data on signals at a component’s interface. For a disk drive the focus may, for instance, be on spin-up, track-following or seeking. • The development of a high-level (sub)system model is also indispensable for the virtual testing of the analogue circuitry. The test program development may be carried out much earlier in combination with a model of the testing equipment. 158 7 MECHATRONICS • Finally, when the product is with the customer, i.e. a disk drive company, or even in the field, the analysis of spurious behaviour on the system model is much easier for application engineers, since every signal or quantity is visible. Unfortunately, this does not cover all possible faults of a device, since imple- mentation related effects are not taken into account in system modelling. On the other hand, with adequate fault modelling it should be easy to prove or disprove any hypothesis that the application engineers may have on the root cause of system failures. In the following, this will be illustrated on the basis of the example of the servo control of a disk drive system. 7.5.5 System modelling A disk drive comprises digital and analogue/power electronics, firmware and mechanics which—as pointed out before— results in three major interfaces: hardware–software, analogue–digital and electronics–mechanics. These interfaces have to be handled at the same time, which does not necessarily mean that the complete drive has to be present in any system simulation, but for instance when assessing the servo control for controlling the track following or seeking, all interfaces are present, see Figure 7.16. Without loss of generality, we restrict ourselves to the servo control in the following. The model comprises the seeking and track-following controller which is for- mulated in C and in the real system is implemented in firmware. Its inputs are the current track and the required track. Its output is a digital value for the required current to drive the head assembly. According to this value, the current is regulated Spindle driver Voice coil motor Commu- tation Spindle control Pre-amp/RW-channel (digital model) Tra ck (d igital mod el) Spindle motor Inertiaresonances VCM driver Processor core Servo control Buffer RAM Host Buffer control Sequen- cer IDE SCSI ROM Buffer data bus D riv e in te rfa ce Servo control Figure 7.16 Disk drive schematic with servo control 7.5 DEMONSTRATOR 4: DISK DRIVE 159 by an analogue/power circuit, i.e. motion-control. The voice coil motor transforms the current into motion of the head assembly which may or may not contain res- onances. The mechanical motion results in a track position which is fed into the firmware controller. The track content including track-id—as well as the logic to detect it— is reduced to a more or less trivial digital model, since it does not add to the overall function of the servo control. The simulation of the servo control is performed on the basis of the mixed-mode simulator Saber. The analogue part of the system—motion-control and mechan- ics—are modelled in the analogue hardware description language MAST. Some basic digital modelling including the synchronisation between the regulator C- routine and the rest of the system is carried out using the digital capabilities of MAST. 7.5.6 Simulation and results The high-level model of the servo control as described in the previous section can be used for concept engineering. For example, it is trivial to change the number of servo fields in a track, which at a fixed rotational speed determines the frequency of position measurements and thus the frequency of the digital controller. In the same manner, most of the other variables determining the function and performance of a drive may be varied. This can even be carried out systematically, e.g. by a parameter sweep or— if more than one parameter is involved—on a Monte-Carlo basis. All these variations can be simulated efficiently. For instance, the simulation of a long seek over 20 000 tracks takes about 80CPU seconds for 20ms real-time on a SUN Ultra 60 workstation, see Figure 7.17. One can easily spot the ‘bang- bang’ strategy of maximum acceleration, constant speed at the speed-limit and maximum deceleration to lock into the new track position. Incidentally, the speed limit is due to the fact that the read/write-head rides on an air cushion. This requires an air-stream in the direction of the tracks, which is created by the rotations of the disk(s). The movement for track seeking is perpendicular to that and could seriously disturb the mechanism described above beyond a certain speed. In the next step, the motion-control part of the servo control model was replaced by its implementation, represented by about 300 CMOS transistors and some DMOS power transistors. The real-life circuitry was thereby verified in The Virtual Disk Drive, which is far more meaningful than the results of classical analogue test benches. With the same configuration as the previous long-seek analysis, the simulation takes about 9 CPU hours. Note that most seek operations are performed much quicker and that track-following can be reasonably assessed in an even shorter period. In addition to the standard tasks of seeking and track following, it is now easily possible to review the implementation of special features, e.g. a request to park the heads in the landing zone. The virtual testing of analogue circuitry is currently under evaluation. The devel- opment of a high-level system model is absolutely indispensable to this. This will 160 7 MECHATRONICS Graph0 t(s) 0.0 0.001 0.002 0.003 0.004 0.005 0.006 0.007 0.008 0.009 0.01 0.011 0.012 0.013 0.014 0.015 0.016 0.017 0.018 0.019 [#t rac k] −5000.0 0.0 5000.0 10000.0 15000.0 20000.0 25000.0 [ra d/ se c] 0.0 20.0 40.0 60.0 [A ] −1.0 −0.5 0.0 0.5
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